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Message-ID: <20180919085948.195633798@infradead.org>
Date: Wed, 19 Sep 2018 10:50:24 +0200
From: Peter Zijlstra <peterz@...radead.org>
To: Thomas Gleixner <tglx@...utronix.de>
Cc: linux-kernel@...r.kernel.org, x86@...nel.org,
Peter Zijlstra <peterz@...radead.org>,
Bin Yang <bin.yang@...el.com>,
Dave Hansen <dave.hansen@...el.com>,
Mark Gross <mark.gross@...el.com>
Subject: [PATCH 8/8] x86/mm/cpa: Optimize __cpa_flush_range()
If we IPI for WBINDV, then we might as well kill the entire TLB too.
But if we don't have to invalidate cache, there is no reason not to
use a range TLB flush.
Signed-off-by: Peter Zijlstra (Intel) <peterz@...radead.org>
---
arch/x86/mm/pageattr.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/arch/x86/mm/pageattr.c
+++ b/arch/x86/mm/pageattr.c
@@ -291,7 +291,7 @@ static bool __cpa_flush_range(unsigned l
WARN_ON(PAGE_ALIGN(start) != start);
- if (!static_cpu_has(X86_FEATURE_CLFLUSH)) {
+ if (cache && !static_cpu_has(X86_FEATURE_CLFLUSH)) {
cpa_flush_all(cache);
return true;
}
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