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Date:   Thu, 20 Sep 2018 16:11:15 +0200
From:   Peter Zijlstra <peterz@...radead.org>
To:     Reinette Chatre <reinette.chatre@...el.com>
Cc:     tglx@...utronix.de, fenghua.yu@...el.com, tony.luck@...el.com,
        mingo@...hat.com, acme@...nel.org, gavin.hindman@...el.com,
        jithu.joseph@...el.com, dave.hansen@...el.com, hpa@...or.com,
        x86@...nel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH V5 5/6] x86/intel_rdt: Use perf infrastructure for
 measurements

On Wed, Sep 19, 2018 at 10:29:10AM -0700, Reinette Chatre wrote:
> +static int measure_l3_residency(void *_plr)
> +{

> +	counts.miss_after -= counts.miss_before;
> +	if (boot_cpu_data.x86_model == INTEL_FAM6_BROADWELL_X) {
> +		/*
> +		 * On BDW references and misses are counted, need to adjust.
> +		 * Sometimes the "hits" counter is a bit more than the
> +		 * references, for example, x references but x + 1 hits.
> +		 * To not report invalid hit values in this case we treat
> +		 * that as misses equal to references.
> +		 */
> +		/* First compute the number of cache references measured */
> +		counts.hits_after -= counts.hits_before;

> +		/* Next convert references to cache hits */
> +		counts.hits_after -= counts.miss_after > counts.hits_after ?
> +					counts.hits_after : counts.miss_after;

Maybe:
		counts.hits_after -= min(counts.hits_after, counts.miss_after);

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