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Message-Id: <20180920191646.18198-12-f.fainelli@gmail.com>
Date: Thu, 20 Sep 2018 12:16:45 -0700
From: Florian Fainelli <f.fainelli@...il.com>
To: linux-kernel@...r.kernel.org
Cc: Florian Fainelli <f.fainelli@...il.com>,
Jens Axboe <axboe@...nel.dk>, Rob Herring <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>,
Kishon Vijay Abraham I <kishon@...com>,
Al Cooper <alcooperx@...il.com>,
Ray Jui <ray.jui@...adcom.com>, Tejun Heo <tj@...nel.org>,
Fengguang Wu <fengguang.wu@...el.com>,
Arnd Bergmann <arnd@...db.de>,
linux-ide@...r.kernel.org (open list:LIBATA SUBSYSTEM (Serial and
Parallel ATA drivers)),
devicetree@...r.kernel.org (open list:OPEN FIRMWARE AND FLATTENED
DEVICE TREE BINDINGS), bcm-kernel-feedback-list@...adcom.com
Subject: [PATCH 8/9] ARM: dts: BCM63xx: enable SATA PHY and AHCI controller
Add Device Tree entries for the Broadcom AHCI and SATA PHY controller
found on BCM63138 SoCs
Signed-off-by: Florian Fainelli <f.fainelli@...il.com>
---
arch/arm/boot/dts/bcm63138.dtsi | 30 ++++++++++++++++++++++++++++++
1 file changed, 30 insertions(+)
diff --git a/arch/arm/boot/dts/bcm63138.dtsi b/arch/arm/boot/dts/bcm63138.dtsi
index 6df61518776f..546aabc6f965 100644
--- a/arch/arm/boot/dts/bcm63138.dtsi
+++ b/arch/arm/boot/dts/bcm63138.dtsi
@@ -143,6 +143,36 @@
reg = <0x4800e0 0x10>;
#reset-cells = <2>;
};
+
+ ahci: sata@...0 {
+ compatible = "brcm,bcm63138-ahci", "brcm,sata3-ahci";
+ reg-names = "ahci", "top-ctrl";
+ reg = <0xa000 0x9ac>, <0x8040 0x24>;
+ interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ resets = <&pmb0 3 1>;
+ status = "disabled";
+
+ sata0: sata-port@0 {
+ reg = <0>;
+ phys = <&sata_phy0>;
+ };
+ };
+
+ sata_phy: sata-phy@...0 {
+ compatible = "brcm,bcm63138-sata-phy", "brcm,phy-sata3";
+ reg = <0x8100 0x1e00>;
+ reg-names = "phy";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+
+ sata_phy0: sata-phy@0 {
+ reg = <0>;
+ #phy-cells = <0>;
+ };
+ };
};
/* Legacy UBUS base */
--
2.17.1
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