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Message-ID: <86h8iix2rk.wl-marc.zyngier@arm.com>
Date: Fri, 21 Sep 2018 16:56:47 +0100
From: Marc Zyngier <marc.zyngier@....com>
To: Julien Thierry <julien.thierry@....com>
Cc: <linux-arm-kernel@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>, <daniel.thompson@...aro.org>,
<joel@...lfernandes.org>, <mark.rutland@....com>,
<christoffer.dall@....com>, <james.morse@....com>,
<catalin.marinas@....com>, <will.deacon@....com>,
Suzuki K Poulose <suzuki.poulose@....com>
Subject: Re: [PATCH v5 01/27] arm64: cpufeature: Set SYSREG_GIC_CPUIF as a boot system feature
On Tue, 28 Aug 2018 16:51:11 +0100,
Julien Thierry <julien.thierry@....com> wrote:
>
> Signed-off-by: Julien Thierry <julien.thierry@....com>
> Suggested-by: Daniel Thompson <daniel.thompson@...aro.org>
> Cc: Catalin Marinas <catalin.marinas@....com>
> Cc: Will Deacon <will.deacon@....com>
> Cc: Suzuki K Poulose <suzuki.poulose@....com>
> Cc: Marc Zyngier <marc.zyngier@....com>
> ---
> arch/arm64/kernel/cpufeature.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
> index e238b79..1e433ac 100644
> --- a/arch/arm64/kernel/cpufeature.c
> +++ b/arch/arm64/kernel/cpufeature.c
> @@ -1039,7 +1039,7 @@ static void cpu_has_fwb(const struct arm64_cpu_capabilities *__unused)
> {
> .desc = "GIC system register CPU interface",
> .capability = ARM64_HAS_SYSREG_GIC_CPUIF,
> - .type = ARM64_CPUCAP_SYSTEM_FEATURE,
> + .type = ARM64_CPUCAP_STRICT_BOOT_CPU_FEATURE,
> .matches = has_useable_gicv3_cpuif,
> .sys_reg = SYS_ID_AA64PFR0_EL1,
> .field_pos = ID_AA64PFR0_GIC_SHIFT,
> --
> 1.9.1
>
This definitely deserves a commit message, such as:
"We do not support systems where some CPUs have an operational GICv3
CPU interface, and some don't. Let's make this requirement obvious by
flagging the GICv3 capability as being strict."
Thanks,
M.
--
Jazz is not dead, it just smell funny.
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