linux-kernel - Re: [PATCH v14 04/19] x86/cpufeatures: Add SGX feature bits

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date:   Tue, 25 Sep 2018 18:48:54 +0200
From:   Borislav Petkov <bp@...en8.de>
To:     Jarkko Sakkinen <jarkko.sakkinen@...ux.intel.com>
Cc:     x86@...nel.org, platform-driver-x86@...r.kernel.org,
        dave.hansen@...el.com, sean.j.christopherson@...el.com,
        nhorman@...hat.com, npmccallum@...hat.com, serge.ayoun@...el.com,
        shay.katz-zamir@...el.com, linux-sgx@...r.kernel.org,
        andriy.shevchenko@...ux.intel.com,
        Thomas Gleixner <tglx@...utronix.de>,
        Ingo Molnar <mingo@...hat.com>,
        "H. Peter Anvin" <hpa@...or.com>,
        Konrad Rzeszutek Wilk <konrad.wilk@...cle.com>,
        David Woodhouse <dwmw@...zon.co.uk>,
        David Wang <davidwang@...oxin.com>,
        "Kirill A. Shutemov" <kirill.shutemov@...ux.intel.com>,
        "Levin, Alexander (Sasha Levin)" <alexander.levin@...izon.com>,
        Jia Zhang <qianyue.zj@...baba-inc.com>,
        "open list:X86 ARCHITECTURE (32-BIT AND 64-BIT)" 
        <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v14 04/19] x86/cpufeatures: Add SGX feature bits

On Tue, Sep 25, 2018 at 04:06:41PM +0300, Jarkko Sakkinen wrote:
> From: Sean Christopherson <sean.j.christopherson@...el.com>
> 
> Add SGX feature bits as part of the Linux defined leaf 8, which
> currently contains virtualization flags.  There are currently four
> documented SGX feature bits, with more expected in the not-too-distant
> future.

...

> +static void detect_sgx(struct cpuinfo_x86 *c)
> +{
> +#define _X86_FEATURE_SGX1		BIT(0)
> +#define _X86_FEATURE_SGX2		BIT(1)
> +#define _X86_FEATURE_SGX_ENCLV		BIT(5)
> +#define _X86_FEATURE_SGX_ENCLS_C	BIT(6)
> +
> +	unsigned int eax;
> +
> +	clear_cpu_cap(c, X86_FEATURE_SGX1);
> +	clear_cpu_cap(c, X86_FEATURE_SGX2);
> +	clear_cpu_cap(c, X86_FEATURE_SGX_ENCLV);
> +	clear_cpu_cap(c, X86_FEATURE_SGX_ENCLS_C);
> +
> +	if (c->cpuid_level < SGX_CPUID) {
> +		pr_err_once("x86/sgx: cannot enumerate CPUID leaf (0x%x)\n",
> +			    SGX_CPUID);
> +		clear_cpu_cap(c, X86_FEATURE_SGX);
> +		return;
> +	}
> +
> +	eax = cpuid_eax(SGX_CPUID);
> +
> +	if (eax & _X86_FEATURE_SGX1)
> +		set_cpu_cap(c, X86_FEATURE_SGX1);
> +
> +	if (eax & _X86_FEATURE_SGX2)
> +		set_cpu_cap(c, X86_FEATURE_SGX2);
> +
> +	if (eax & _X86_FEATURE_SGX_ENCLV)
> +		set_cpu_cap(c, X86_FEATURE_SGX_ENCLV);
> +
> +	if (eax & _X86_FEATURE_SGX_ENCLS_C)
> +		set_cpu_cap(c, X86_FEATURE_SGX_ENCLS_C);


Look at arch/x86/kernel/cpu/scattered.c for how to do this properly.

-- 
Regards/Gruss,
    Boris.

Good mailing practices for 400: avoid top-posting and trim the reply.