lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [thread-next>] [day] [month] [year] [list]
Message-Id: <20180925203701.13605-1-dangtranhieu2012@gmail.com>
Date:   Wed, 26 Sep 2018 03:36:59 +0700
From:   Hieu Tran Dang <dangtranhieu2012@...il.com>
To:     Mark Brown <broonie@...nel.org>, Rob Herring <robh+dt@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        Gao Pan <pandy.gao@....com>
Cc:     Hieu Tran Dang <dangtranhieu2012@...il.com>,
        linux-spi@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org
Subject: [PATCH 0/2] spi: fsl-lpspi: Option to prevent FIFO under/overrun

Certain devices don't work well when a transmit FIFO underrun or
receive FIFO overrun occurs. Example is the SAF400x radio chip when
running at high speed which leads to garbage being sent to/received from
the chip. In which case, it should stall waiting for further data to be
available before proceeding. This patch add option to configure the SPI
controller to allow stalling (unset NOSTALL bit in CFGR1).

Hieu Tran Dang (2):
  dt-bindings: spi: fsl-lpspi: Option to allow stalling
  spi: fsl-lpspi: Option to prevent FIFO under/overrun

 .../devicetree/bindings/spi/spi-fsl-lpspi.txt          |  2 ++
 drivers/spi/spi-fsl-lpspi.c                            | 10 +++++++++-
 2 files changed, 11 insertions(+), 1 deletion(-)

-- 
2.17.1

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ