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Message-ID: <b99e898f-176f-b587-0d8e-eea18550f3da@linaro.org>
Date: Wed, 26 Sep 2018 17:21:39 +0200
From: Daniel Lezcano <daniel.lezcano@...aro.org>
To: Dinh Nguyen <dinguyen@...nel.org>
Cc: tglx@...utronix.de, linux-kernel@...r.kernel.org,
Marek Vasut <marex@...x.de>
Subject: Re: [PATCH] clocksource: dw_apb: add reset control
On 17/09/2018 16:52, Dinh Nguyen wrote:
> Add code to retrieve the reset property for the dw-apb timers.
The patch does more than that. Can you explain why the assert/deassert ?
> Signed-off-by: Marek Vasut <marex@...x.de>
> Signed-off-by: Dinh Nguyen <dinguyen@...nel.org>
> ---
> drivers/clocksource/dw_apb_timer_of.c | 9 +++++++++
> 1 file changed, 9 insertions(+)
>
> diff --git a/drivers/clocksource/dw_apb_timer_of.c b/drivers/clocksource/dw_apb_timer_of.c
> index 69866cd..24bc073 100644
> --- a/drivers/clocksource/dw_apb_timer_of.c
> +++ b/drivers/clocksource/dw_apb_timer_of.c
> @@ -22,6 +22,7 @@
> #include <linux/of_address.h>
> #include <linux/of_irq.h>
> #include <linux/clk.h>
> +#include <linux/reset.h>
> #include <linux/sched_clock.h>
>
> static void __init timer_get_base_and_rate(struct device_node *np,
> @@ -29,12 +30,20 @@ static void __init timer_get_base_and_rate(struct device_node *np,
> {
> struct clk *timer_clk;
> struct clk *pclk;
> + struct reset_control *rstc;
>
> *base = of_iomap(np, 0);
>
> if (!*base)
> panic("Unable to map regs for %s", np->name);
>
> + /* Unreset the timer if applicable */
> + rstc = of_reset_control_get(np, NULL);
> + if (!IS_ERR(rstc)) {
> + reset_control_assert(rstc);
> + reset_control_deassert(rstc);
> + }
> +
> /*
> * Not all implementations use a periphal clock, so don't panic
> * if it's not present
>
--
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