linux-kernel - [tip:x86/cpu] x86/cpu/mtrr: Support TOP

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Message-ID: <tip-39dc6f154dac134e4612827cb5283934c1862cb8@git.kernel.org>
Date:   Thu, 27 Sep 2018 10:02:09 -0700
From:   tip-bot for Pu Wen <tipbot@...or.com>
To:     linux-tip-commits@...r.kernel.org
Cc:     bp@...e.de, hpa@...or.com, linux-kernel@...r.kernel.org,
        mingo@...nel.org, puwen@...on.cn, tglx@...utronix.de
Subject: [tip:x86/cpu] x86/cpu/mtrr: Support TOP_MEM2 and get MTRR number

Commit-ID:  39dc6f154dac134e4612827cb5283934c1862cb8
Gitweb:     https://git.kernel.org/tip/39dc6f154dac134e4612827cb5283934c1862cb8
Author:     Pu Wen <puwen@...on.cn>
AuthorDate: Sun, 23 Sep 2018 17:34:16 +0800
Committer:  Borislav Petkov <bp@...e.de>
CommitDate: Thu, 27 Sep 2018 18:28:57 +0200

x86/cpu/mtrr: Support TOP_MEM2 and get MTRR number

The Hygon Dhyana CPU has a special MSR way to force WB for memory >4GB,
and support TOP_MEM2. Therefore, it is necessary to add Hygon Dhyana
support in amd_special_default_mtrr().

The number of variable MTRRs for Hygon is 2 as AMD's.

Signed-off-by: Pu Wen <puwen@...on.cn>
Signed-off-by: Borislav Petkov <bp@...e.de>
Reviewed-by: Borislav Petkov <bp@...e.de>
Cc: tglx@...utronix.de
Cc: mingo@...hat.com
Cc: hpa@...or.com
Cc: x86@...nel.org
Cc: thomas.lendacky@....com
Link: https://lkml.kernel.org/r/8246f81648d014601de3812ade40e85d9c50d9b3.1537533369.git.puwen@hygon.cn
---
 arch/x86/kernel/cpu/mtrr/cleanup.c | 3 ++-
 arch/x86/kernel/cpu/mtrr/mtrr.c    | 2 +-
 2 files changed, 3 insertions(+), 2 deletions(-)

diff --git a/arch/x86/kernel/cpu/mtrr/cleanup.c b/arch/x86/kernel/cpu/mtrr/cleanup.c
index 765afd599039..3668c5df90c6 100644
--- a/arch/x86/kernel/cpu/mtrr/cleanup.c
+++ b/arch/x86/kernel/cpu/mtrr/cleanup.c
@@ -831,7 +831,8 @@ int __init amd_special_default_mtrr(void)
 {
 	u32 l, h;
 
-	if (boot_cpu_data.x86_vendor != X86_VENDOR_AMD)
+	if (boot_cpu_data.x86_vendor != X86_VENDOR_AMD &&
+	    boot_cpu_data.x86_vendor != X86_VENDOR_HYGON)
 		return 0;
 	if (boot_cpu_data.x86 < 0xf)
 		return 0;
diff --git a/arch/x86/kernel/cpu/mtrr/mtrr.c b/arch/x86/kernel/cpu/mtrr/mtrr.c
index 9a19c800fe40..507039c20128 100644
--- a/arch/x86/kernel/cpu/mtrr/mtrr.c
+++ b/arch/x86/kernel/cpu/mtrr/mtrr.c
@@ -127,7 +127,7 @@ static void __init set_num_var_ranges(void)
 
 	if (use_intel())
 		rdmsr(MSR_MTRRcap, config, dummy);
-	else if (is_cpu(AMD))
+	else if (is_cpu(AMD) || is_cpu(HYGON))
 		config = 2;
 	else if (is_cpu(CYRIX) || is_cpu(CENTAUR))
 		config = 8;