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Message-ID: <ec232ce22c1a409180725d5e88a1175a@AcuMS.aculab.com>
Date:   Thu, 27 Sep 2018 12:16:14 +0000
From:   David Laight <David.Laight@...LAB.COM>
To:     'Peter Zijlstra' <peterz@...radead.org>,
        "will.deacon@....com" <will.deacon@....com>,
        "mingo@...nel.org" <mingo@...nel.org>
CC:     "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "longman@...hat.com" <longman@...hat.com>,
        "andrea.parri@...rulasolutions.com" 
        <andrea.parri@...rulasolutions.com>,
        "tglx@...utronix.de" <tglx@...utronix.de>
Subject: RE: [RFC][PATCH 3/3] locking/qspinlock: Optimize for x86

From: Peter Zijlstra
> Sent: 26 September 2018 12:01
> 
> On x86 we cannot do fetch_or with a single instruction and end up
> using a cmpxchg loop, this reduces determinism. Replace the fetch_or
> with a very tricky composite xchg8 + load.
> 
> The basic idea is that we use xchg8 to test-and-set the pending bit
> (when it is a byte) and then a load to fetch the whole word. Using
> two instructions of course opens a window we previously did not have.
...

IIRC the load will be 'slow' because it will have to wait for the
earlier store to actually complete - rather than being satisfied
by data from the store buffer (because the widths are different).

This may not matter for xchg ?

	David

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