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Date:   Sat, 29 Sep 2018 10:37:56 +0800
From:   Chaotian Jing <chaotian.jing@...iatek.com>
To:     Sean Wang <sean.wang@...iatek.com>
CC:     Ulf Hansson <ulf.hansson@...aro.org>,
        Rob Herring <robh+dt@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        Matthias Brugger <matthias.bgg@...il.com>,
        Ryder Lee <ryder.lee@...iatek.com>,
        Wolfram Sang <wsa+renesas@...g-engineering.com>,
        <linux-mmc@...r.kernel.org>, <devicetree@...r.kernel.org>,
        <linux-arm-kernel@...ts.infradead.org>,
        <linux-mediatek@...ts.infradead.org>,
        <linux-kernel@...r.kernel.org>, <srv_heupstream@...iatek.com>
Subject: Re: [PATCH 1/2] mmc: dt-bindings: add "bus-clk" for MT2712

On Sat, 2018-09-29 at 01:34 +0800, Sean Wang wrote:
> On Fri, 2018-09-28 at 19:40 +0800, Chaotian Jing wrote:
> > On MT2712 MSDC0/3, HCLK/bus-clk need gate/ungate together,
> > or will hang when access MSDC register.
> > 
> > Signed-off-by: Chaotian Jing <chaotian.jing@...iatek.com>
> > ---
> >  Documentation/devicetree/bindings/mmc/mtk-sd.txt | 1 +
> >  1 file changed, 1 insertion(+)
> > 
> > diff --git a/Documentation/devicetree/bindings/mmc/mtk-sd.txt b/Documentation/devicetree/bindings/mmc/mtk-sd.txt
> > index f33467a..182299b 100644
> > --- a/Documentation/devicetree/bindings/mmc/mtk-sd.txt
> > +++ b/Documentation/devicetree/bindings/mmc/mtk-sd.txt
> > @@ -22,6 +22,7 @@ Required properties:
> >  	"source" - source clock (required)
> >  	"hclk" - HCLK which used for host (required)
> >  	"source_cg" - independent source clock gate (required for MT2712)
> > +	"bus_clk" - bus clk used for internal register access(required for MT2712 MSDC0/3)
> 
> use a full name in the description such as changing "clk" to "clock" and
> 
> add an extra blank char prior to left parenthesis
> 
OK, fixed at v1 version.

> >  - pinctrl-names: should be "default", "state_uhs"
> >  - pinctrl-0: should contain default/high speed pin ctrl
> >  - pinctrl-1: should contain uhs mode pin ctrl
> 
> 


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