[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <CAD=FV=VY_BvyQywUQMwTuRw=Niq0JMaaJQNrpsGiNF8kt_Wsww@mail.gmail.com>
Date: Fri, 28 Sep 2018 17:18:47 -0700
From: Doug Anderson <dianders@...omium.org>
To: ryandcase@...omium.org
Cc: Stephen Boyd <swboyd@...omium.org>,
Mark Brown <broonie@...nel.org>,
Randy Dunlap <rdunlap@...radead.org>,
linux-arm-msm <linux-arm-msm@...r.kernel.org>,
Trent Piepho <tpiepho@...inj.com>, boris.brezillon@...tlin.com,
Girish Mahadevan <girishm@...eaurora.org>,
LKML <linux-kernel@...r.kernel.org>,
linux-spi <linux-spi@...r.kernel.org>
Subject: Re: [PATCH v3 2/2] spi: Introduce new driver for Qualcomm QuadSPI controller
Hi,
On Fri, Sep 28, 2018 at 11:20 AM Ryan Case <ryandcase@...omium.org> wrote:
> > > + master->max_speed_hz = 300000000;
> > > + master->num_chipselect = QSPI_NUM_CS;
> > > + master->bus_num = pdev->id;
> >
> > Can this come from DT aliases? I've never thought about qspi and
> > "regular" spi being in the same spi bus numbering system, but I suppose
> > that will happen now and we need to make sure that qspi numbers start
> > after the regular ones?
>
> I'm not sure. Can look into it.
In a previous response for the other Qualcomm SPI driver Mark said to
set this to -1. Specifically the code was checking the alias and Mark
said:
> Don't do this, just set bus_num to -1 and let the core assign an ID.
[1] https://lkml.kernel.org/r/20180503233849.GF13402@sirena.org.uk
-Doug
Powered by blists - more mailing lists