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Message-ID: <CAD8Lp47uL3DQTBiVTduO1+Cg8px4CDpv26qVJsgT+RJ4WZx9oA@mail.gmail.com>
Date: Mon, 1 Oct 2018 12:57:11 +0800
From: Daniel Drake <drake@...lessm.com>
To: Thomas Martitz <kugel@...kbox.org>
Cc: Bjorn Helgaas <helgaas@...nel.org>,
Bjorn Helgaas <bhelgaas@...gle.com>,
Linux PCI <linux-pci@...r.kernel.org>,
Linux Upstreaming Team <linux@...lessm.com>,
nouveau@...ts.freedesktop.org, Linux PM <linux-pm@...r.kernel.org>,
Peter Wu <peter@...ensteyn.nl>, kherbst@...hat.com,
andy.shevchenko@...ux.intel.com,
"Wysocki, Rafael J" <rafael.j.wysocki@...el.com>,
Keith Busch <keith.busch@...el.com>,
Jon Derrick <jonathan.derrick@...el.com>,
David Miller <davem@...emloft.net>,
Heiner Kallweit <hkallweit1@...il.com>,
netdev <netdev@...r.kernel.org>, nic_swsd@...ltek.com,
rchang@...vell.com, Linux Kernel <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v3] PCI: Reprogram bridge prefetch registers on resume
On Sun, Sep 30, 2018 at 5:07 AM Thomas Martitz <kugel@...kbox.org> wrote:
> The latest iteration does not work on my HP system. The GPU fails to
> power up just like the unpatched kernel.
That's weird, I would not expect a behaviour change in the latest
patch. pci_restore_config_dword() has some debug messages, could you
please make them visible and show logs again?
Also remind us of the PCI device address of the parent bridge (lspci -vt)
Thanks
Daniel
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