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Message-Id: <1538507707-22299-11-git-send-email-atish.patra@wdc.com>
Date: Tue, 2 Oct 2018 12:15:03 -0700
From: Atish Patra <atish.patra@....com>
To: linux-riscv@...ts.infradead.org, palmer@...ive.com
Cc: anup@...infault.org, hch@...radead.org,
linux-kernel@...r.kernel.org, atish.patra@....com
Subject: [PATCH v6 10/14] RISC-V: Use WRITE_ONCE instead of direct access
The secondary harts spin on couple of per cpu variables until both of
these are non-zero so it's not necessary to have any ordering here.
However, WRITE_ONCE should be used to avoid tearing.
Signed-off-by: Atish Patra <atish.patra@....com>
Reviewed-by: Christoph Hellwig <hch@....de>
---
arch/riscv/kernel/smpboot.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/riscv/kernel/smpboot.c b/arch/riscv/kernel/smpboot.c
index 17e74831..1e478615 100644
--- a/arch/riscv/kernel/smpboot.c
+++ b/arch/riscv/kernel/smpboot.c
@@ -81,8 +81,9 @@ int __cpu_up(unsigned int cpu, struct task_struct *tidle)
* the spinning harts that they can continue the boot process.
*/
smp_mb();
- __cpu_up_stack_pointer[cpu] = task_stack_page(tidle) + THREAD_SIZE;
- __cpu_up_task_pointer[cpu] = tidle;
+ WRITE_ONCE(__cpu_up_stack_pointer[cpu],
+ task_stack_page(tidle) + THREAD_SIZE);
+ WRITE_ONCE(__cpu_up_task_pointer[cpu], tidle);
while (!cpu_online(cpu))
cpu_relax();
--
2.7.4
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