[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <57caeb7b5a221476d4c43eccfc5f8e8faa6c61c3.1538507155.git.leonard.crestez@nxp.com>
Date: Tue, 2 Oct 2018 19:18:23 +0000
From: Leonard Crestez <leonard.crestez@....com>
To: Fabio Estevam <fabio.estevam@....com>,
Shawn Guo <shawnguo@...nel.org>
CC: Marek Vasut <marek.vasut@...il.com>,
Herbert Xu <herbert@...dor.apana.org.au>,
Horia Geanta <horia.geanta@....com>,
Franck Lenormand <franck.lenormand@....com>,
Aymen Sghaier <aymen.sghaier@....com>,
"David S . Miller " <davem@...emloft.net>,
dl-linux-imx <linux-imx@....com>,
"kernel@...gutronix.de" <kernel@...gutronix.de>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: [PATCH 3/3] ARM: dts: imx6ull: Add dcp node
The DCP block on 6ull has no major differences other than requiring
explicit clock enabling.
Signed-off-by: Leonard Crestez <leonard.crestez@....com>
---
arch/arm/boot/dts/imx6ull.dtsi | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/imx6ull.dtsi b/arch/arm/boot/dts/imx6ull.dtsi
index cd1776a7015a..e3e3528068e9 100644
--- a/arch/arm/boot/dts/imx6ull.dtsi
+++ b/arch/arm/boot/dts/imx6ull.dtsi
@@ -37,10 +37,20 @@
#address-cells = <1>;
#size-cells = <1>;
reg = <0x02200000 0x100000>;
ranges;
+ dcp: dcp@...0000 {
+ compatible = "fsl,imx6ull-dcp", "fsl,imx28-dcp";
+ reg = <0x02280000 0x4000>;
+ interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks IMX6ULL_CLK_DCP_CLK>;
+ clock-names = "dcp";
+ };
+
iomuxc_snvs: iomuxc-snvs@...0000 {
compatible = "fsl,imx6ull-iomuxc-snvs";
reg = <0x02290000 0x4000>;
};
--
2.17.1
Powered by blists - more mailing lists