lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <alpine.DEB.2.21.1810020820430.32062@nanos.tec.linutronix.de>
Date:   Tue, 2 Oct 2018 08:22:51 +0200 (CEST)
From:   Thomas Gleixner <tglx@...utronix.de>
To:     Mike Travis <mike.travis@....com>
cc:     Ingo Molnar <mingo@...hat.com>, "H. Peter Anvin" <hpa@...or.com>,
        Hedi Berriche <hedi@....com>,
        Russ Anderson <russ.anderson@....com>,
        Dimitri Sivanich <dimitri.sivanich@....com>,
        Borislav Petkov <bp@...en8.de>,
        Kate Stewart <kstewart@...uxfoundation.org>,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        Philippe Ombredanne <pombredanne@...b.com>,
        Pavel Tatashin <pasha.tatashin@...cle.com>,
        Dave Hansen <dave.hansen@...el.com>,
        Tom Lendacky <thomas.lendacky@....com>,
        Ram Pai <linuxram@...ibm.com>, Juergen Gross <jgross@...e.com>,
        "Kirill A. Shutemov" <kirill.shutemov@...ux.intel.com>,
        Andi Kleen <ak@...ux.intel.com>,
        Petr Tesarik <ptesarik@...e.cz>,
        Sinan Kaya <okaya@...eaurora.org>, x86@...nel.org,
        linux-kernel@...r.kernel.org, Hedi Berriche <hedi.berriche@....com>
Subject: Re: [PATCH 2/2] x86/tsc: Fix UV TSC initialization

On Mon, 1 Oct 2018, Mike Travis wrote:

> Fix regression introduced by
> 
> commit cf7a63ef4e02 ("x86/tsc: Calibrate tsc only once")
> 
> as it changed setup_arch() so that it now calls tsc_early_init() before
> acpi_boot_table_init() which is a necessary step, in the case of UV
> systems, to inform tsc_sanitize_first_cpu() that we're on a platform
> with async TSC resets as documented in
> 
> commit 341102c3ef29 ("x86/tsc: Add option that TSC on Socket 0 being non-zero is valid")
> 
> Fix by skipping tsc_early_init() on UV systems and let TSC initialization
> take place later in tsc_init().
> 
> Fixes: cf7a63ef4e02 ("x86/tsc: Calibrate tsc only once") 
> Signed-off-by: Mike Travis <mike.travis@....com>
> Signed-off-by: Hedi Berriche <hedi.berriche@....com>

See previous mail.

> Reviewed-by: Russ Anderson <rja@....com>
> Reviewed-by: Dimitri Sivanich <sivanich@....com>
> ---
>  arch/x86/kernel/setup.c |    6 +++++-
>  1 file changed, 5 insertions(+), 1 deletion(-)
> 
> --- linux.orig/arch/x86/kernel/setup.c
> +++ linux/arch/x86/kernel/setup.c
> @@ -117,6 +117,7 @@
>  #include <asm/microcode.h>
>  #include <asm/kaslr.h>
>  #include <asm/unwind.h>
> +#include <asm/uv/uv.h>
>  
>  /*
>   * max_low_pfn_mapped: highest direct mapped pfn under 4GB
> @@ -1015,7 +1016,10 @@ void __init setup_arch(char **cmdline_p)
>  	 */
>  	init_hypervisor_platform();
>  
> -	tsc_early_init();
> +	/* UV TSC multi-chassis synchronization already set, don't change it */
> +	if (!is_early_uv_system())
> +		tsc_early_init();

tsc_early_init() has already a check which makes it not invoke the
calibration code, so please put your uv check into that.

Thanks,

	tglx

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ