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Message-ID: <CAMuHMdWc8qfzFdFeuJgJaTgSvws_AOBu4c9o91b=4FwMDYwPnw@mail.gmail.com>
Date:   Tue, 2 Oct 2018 12:29:24 +0200
From:   Geert Uytterhoeven <geert@...ux-m68k.org>
To:     Phil Edworthy <phil.edworthy@...esas.com>
Cc:     Laurent Pinchart <laurent.pinchart@...asonboard.com>,
        Rob Herring <robh+dt@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        Jacopo Mondi <jacopo@...ndi.org>,
        Linus Walleij <linus.walleij@...aro.org>,
        Simon Horman <horms@...ge.net.au>,
        "open list:GPIO SUBSYSTEM" <linux-gpio@...r.kernel.org>,
        Linux-Renesas <linux-renesas-soc@...r.kernel.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
        <devicetree@...r.kernel.org>
Subject: Re: [PATCH v7 1/3] dt-bindings: pinctrl: renesas,rzn1-pinctrl: documentation

Hi Phil,

On Mon, Oct 1, 2018 at 3:10 PM Phil Edworthy <phil.edworthy@...esas.com> wrote:
> The Renesas RZ/N1 device family PINCTRL node description.
>
> Based on a patch originally written by Michel Pollet at Renesas.
>
> Signed-off-by: Phil Edworthy <phil.edworthy@...esas.com>
> Reviewed-by: Jacopo Mondi <jacopo+renesas@...ndi.org>
> ---
> v7:
>  - Revert changes in v6, and just remove the token pasting
>
> v6:
>  - Instead of combining the pin nr and func into a single element, use
>    a pair of 8-bit elements.

Thanks for the update!

I have replaced v5 with v7, after s/RZN1_MUX/RZN1_PINMUX/s for
consistency with other SoC families.

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

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