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Message-Id: <20181004083315.31174-1-suzuki.poulose@arm.com>
Date: Thu, 4 Oct 2018 09:33:12 +0100
From: Suzuki K Poulose <suzuki.poulose@....com>
To: linux-arm-kernel@...ts.infradead.org
Cc: linux-kernel@...r.kernel.org, catalin.marinas@....com,
will.deacon@....com, mark.rutland@....com, suzuki.poulose@....com,
pelcan@...eaurora.org, shankerd@...eaurora.org
Subject: [PATCH 0/3] arm64: cpufeature: Fix handling of CTR_EL0
This series makes sure that we handle the CTR_EL0 field mismatches
properly, especially for the IDC field. Also, skip trapping CTR
accesses on a CPU if it matches the safe value.
Applies on arm64 for-next/core
Suzuki K Poulose (3):
arm64: cpufeature: ctr: Fix cpu capability check for late CPUs
arm64: cpufeature: Fix handling of CTR_EL0.IDC field
arm64: cpufeature: Trap CTR_EL0 access only where it is necessary
arch/arm64/include/asm/cache.h | 40 ++++++++++++++++++++++++++++++++++
arch/arm64/kernel/cpu_errata.c | 17 ++++++++++++---
arch/arm64/kernel/cpufeature.c | 35 +++++++++++++++++++++++++----
arch/arm64/kernel/cpuinfo.c | 10 ++++++++-
4 files changed, 94 insertions(+), 8 deletions(-)
--
2.19.0
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