linux-kernel - [PATCH v4 3/6] clk: qoriq: increase array size of cmux_to

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Message-Id: <1538615031-7507-4-git-send-email-vabhav.sharma@nxp.com>
Date:   Thu,  4 Oct 2018 06:33:48 +0530
From:   Vabhav Sharma <vabhav.sharma@....com>
To:     sudeep.holla@....com, oss@...error.net,
        linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
        robh+dt@...nel.org, mark.rutland@....com,
        linuxppc-dev@...ts.ozlabs.org,
        linux-arm-kernel@...ts.infradead.org, mturquette@...libre.com,
        sboyd@...nel.org, rjw@...ysocki.net, viresh.kumar@...aro.org,
        linux-clk@...r.kernel.org, linux-pm@...r.kernel.org,
        linux-kernel-owner@...r.kernel.org, catalin.marinas@....com,
        will.deacon@....com, gregkh@...uxfoundation.org, arnd@...db.de,
        kstewart@...uxfoundation.org, yamada.masahiro@...ionext.com,
        leoyang.li@....com, shawnguo@...nel.org
Cc:     linux@...linux.org.uk, V.Sethi@....com, udit.kumar@....com,
        pankaj.bansal@....com, Yogesh Gaur <yogeshnarayan.gaur@....com>,
        Vabhav Sharma <vabhav.sharma@....com>
Subject: [PATCH v4 3/6] clk: qoriq: increase array size of cmux_to_group

From: Yogesh Gaur <yogeshnarayan.gaur@....com>

Increase size of cmux_to_group array, to accomdate entry of
-1 termination.

Added -1, terminated, entry for 4080_cmux_grpX.

Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur@....com>
Signed-off-by: Vabhav Sharma <vabhav.sharma@....com>
---
 drivers/clk/clk-qoriq.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/clk/clk-qoriq.c b/drivers/clk/clk-qoriq.c
index 3a1812f..e152bfb 100644
--- a/drivers/clk/clk-qoriq.c
+++ b/drivers/clk/clk-qoriq.c
@@ -79,7 +79,7 @@ struct clockgen_chipinfo {
 	const struct clockgen_muxinfo *cmux_groups[2];
 	const struct clockgen_muxinfo *hwaccel[NUM_HWACCEL];
 	void (*init_periph)(struct clockgen *cg);
-	int cmux_to_group[NUM_CMUX]; /* -1 terminates if fewer than NUM_CMUX */
+	int cmux_to_group[NUM_CMUX+1]; /* array should be -1 terminated */
 	u32 pll_mask;	/* 1 << n bit set if PLL n is valid */
 	u32 flags;	/* CG_xxx */
 };
@@ -601,7 +601,7 @@ static const struct clockgen_chipinfo chipinfo[] = {
 			&p4080_cmux_grp1, &p4080_cmux_grp2
 		},
 		.cmux_to_group = {
-			0, 0, 0, 0, 1, 1, 1, 1
+			0, 0, 0, 0, 1, 1, 1, 1, -1
 		},
 		.pll_mask = 0x1f,
 	},
-- 
2.7.4