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Message-ID: <8055896d-f1cd-3560-2f08-ab367270beae@c-s.fr>
Date:   Fri, 5 Oct 2018 15:45:54 +0200
From:   Christophe LEROY <christophe.leroy@....fr>
To:     Benjamin Herrenschmidt <benh@...nel.crashing.org>,
        Paul Mackerras <paulus@...ba.org>,
        Michael Ellerman <mpe@...erman.id.au>
Cc:     linuxppc-dev@...ts.ozlabs.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v5 1/9] book3s/64: avoid circular header inclusion in
 mmu-hash.h

The serie has been successfully compiled tested at 
http://kisskb.ellerman.id.au/kisskb/head/358723b36b126a381d827c82d04ee226321416b2/

Christophe

Le 05/10/2018 à 09:32, Christophe Leroy a écrit :
> When activating CONFIG_THREAD_INFO_IN_TASK, linux/sched.h
> includes asm/current.h. This generates a circular dependency.
> To avoid that, asm/processor.h shall not be included in mmu-hash.h
> 
> In order to do that, this patch moves into a new header called
> asm/task_size_user64.h the information from asm/processor.h required
> by mmu-hash.h
> 
> Signed-off-by: Christophe Leroy <christophe.leroy@....fr>
> Reviewed-by: Nicholas Piggin <npiggin@...il.com>
> ---
>   arch/powerpc/include/asm/book3s/64/mmu-hash.h |  2 +-
>   arch/powerpc/include/asm/processor.h          | 34 +---------------------
>   arch/powerpc/include/asm/task_size_user64.h   | 42 +++++++++++++++++++++++++++
>   arch/powerpc/kvm/book3s_hv_hmi.c              |  1 +
>   4 files changed, 45 insertions(+), 34 deletions(-)
>   create mode 100644 arch/powerpc/include/asm/task_size_user64.h
> 
> diff --git a/arch/powerpc/include/asm/book3s/64/mmu-hash.h b/arch/powerpc/include/asm/book3s/64/mmu-hash.h
> index e0e4ce8f77d6..02955d867067 100644
> --- a/arch/powerpc/include/asm/book3s/64/mmu-hash.h
> +++ b/arch/powerpc/include/asm/book3s/64/mmu-hash.h
> @@ -23,7 +23,7 @@
>    */
>   #include <asm/book3s/64/pgtable.h>
>   #include <asm/bug.h>
> -#include <asm/processor.h>
> +#include <asm/task_size_user64.h>
>   #include <asm/cpu_has_feature.h>
>   
>   /*
> diff --git a/arch/powerpc/include/asm/processor.h b/arch/powerpc/include/asm/processor.h
> index 52fadded5c1e..13589274fe9b 100644
> --- a/arch/powerpc/include/asm/processor.h
> +++ b/arch/powerpc/include/asm/processor.h
> @@ -101,40 +101,8 @@ void release_thread(struct task_struct *);
>   #endif
>   
>   #ifdef CONFIG_PPC64
> -/*
> - * 64-bit user address space can have multiple limits
> - * For now supported values are:
> - */
> -#define TASK_SIZE_64TB  (0x0000400000000000UL)
> -#define TASK_SIZE_128TB (0x0000800000000000UL)
> -#define TASK_SIZE_512TB (0x0002000000000000UL)
> -#define TASK_SIZE_1PB   (0x0004000000000000UL)
> -#define TASK_SIZE_2PB   (0x0008000000000000UL)
> -/*
> - * With 52 bits in the address we can support
> - * upto 4PB of range.
> - */
> -#define TASK_SIZE_4PB   (0x0010000000000000UL)
>   
> -/*
> - * For now 512TB is only supported with book3s and 64K linux page size.
> - */
> -#if defined(CONFIG_PPC_BOOK3S_64) && defined(CONFIG_PPC_64K_PAGES)
> -/*
> - * Max value currently used:
> - */
> -#define TASK_SIZE_USER64		TASK_SIZE_4PB
> -#define DEFAULT_MAP_WINDOW_USER64	TASK_SIZE_128TB
> -#define TASK_CONTEXT_SIZE		TASK_SIZE_512TB
> -#else
> -#define TASK_SIZE_USER64		TASK_SIZE_64TB
> -#define DEFAULT_MAP_WINDOW_USER64	TASK_SIZE_64TB
> -/*
> - * We don't need to allocate extended context ids for 4K page size, because
> - * we limit the max effective address on this config to 64TB.
> - */
> -#define TASK_CONTEXT_SIZE		TASK_SIZE_64TB
> -#endif
> +#include <asm/task_size_user64.h>
>   
>   /*
>    * 32-bit user address space is 4GB - 1 page
> diff --git a/arch/powerpc/include/asm/task_size_user64.h b/arch/powerpc/include/asm/task_size_user64.h
> new file mode 100644
> index 000000000000..a4043075864b
> --- /dev/null
> +++ b/arch/powerpc/include/asm/task_size_user64.h
> @@ -0,0 +1,42 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> +#ifndef _ASM_POWERPC_TASK_SIZE_USER64_H
> +#define _ASM_POWERPC_TASK_SIZE_USER64_H
> +
> +#ifdef CONFIG_PPC64
> +/*
> + * 64-bit user address space can have multiple limits
> + * For now supported values are:
> + */
> +#define TASK_SIZE_64TB  (0x0000400000000000UL)
> +#define TASK_SIZE_128TB (0x0000800000000000UL)
> +#define TASK_SIZE_512TB (0x0002000000000000UL)
> +#define TASK_SIZE_1PB   (0x0004000000000000UL)
> +#define TASK_SIZE_2PB   (0x0008000000000000UL)
> +/*
> + * With 52 bits in the address we can support
> + * upto 4PB of range.
> + */
> +#define TASK_SIZE_4PB   (0x0010000000000000UL)
> +
> +/*
> + * For now 512TB is only supported with book3s and 64K linux page size.
> + */
> +#if defined(CONFIG_PPC_BOOK3S_64) && defined(CONFIG_PPC_64K_PAGES)
> +/*
> + * Max value currently used:
> + */
> +#define TASK_SIZE_USER64		TASK_SIZE_4PB
> +#define DEFAULT_MAP_WINDOW_USER64	TASK_SIZE_128TB
> +#define TASK_CONTEXT_SIZE		TASK_SIZE_512TB
> +#else
> +#define TASK_SIZE_USER64		TASK_SIZE_64TB
> +#define DEFAULT_MAP_WINDOW_USER64	TASK_SIZE_64TB
> +/*
> + * We don't need to allocate extended context ids for 4K page size, because
> + * we limit the max effective address on this config to 64TB.
> + */
> +#define TASK_CONTEXT_SIZE		TASK_SIZE_64TB
> +#endif
> +
> +#endif /* CONFIG_PPC64 */
> +#endif /* _ASM_POWERPC_TASK_SIZE_USER64_H */
> diff --git a/arch/powerpc/kvm/book3s_hv_hmi.c b/arch/powerpc/kvm/book3s_hv_hmi.c
> index e3f738eb1cac..64b5011475c7 100644
> --- a/arch/powerpc/kvm/book3s_hv_hmi.c
> +++ b/arch/powerpc/kvm/book3s_hv_hmi.c
> @@ -24,6 +24,7 @@
>   #include <linux/compiler.h>
>   #include <asm/paca.h>
>   #include <asm/hmi.h>
> +#include <asm/processor.h>
>   
>   void wait_for_subcore_guest_exit(void)
>   {
> 

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