linux-kernel - Re: [PATCH] KVM: LAPIC: Tune lapic_timer_advance

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Message-Id: <8847332B-9759-4FF2-B6D8-02334AE11015@oracle.com>
Date:   Mon, 8 Oct 2018 00:02:00 +0300
From:   Liran Alon <liran.alon@...cle.com>
To:     Wanpeng Li <kernellwp@...il.com>
Cc:     linux-kernel@...r.kernel.org, kvm@...r.kernel.org,
        Paolo Bonzini <pbonzini@...hat.com>,
        Radim Krčmář <rkrcmar@...hat.com>
Subject: Re: [PATCH] KVM: LAPIC: Tune lapic_timer_advance_ns automatically



> On 28 Sep 2018, at 9:12, Wanpeng Li <kernellwp@...il.com> wrote:
> 
> From: Wanpeng Li <wanpengli@...cent.com>
> 
> In cloud environment, lapic_timer_advance_ns is needed to be tuned for every CPU 
> generations, and every host kernel versions(the kvm-unit-tests/tscdeadline_latency.flat 
> is 5700 cycles for upstream kernel and 9600 cycles for our 3.10 product kernel, 
> both preemption_timer=N, Skylake server).
> 
> This patch adds the capability to automatically tune lapic_timer_advance_ns
> step by step, the initial value is 1000ns as d0659d946be05 (KVM: x86: add 
> option to advance tscdeadline hrtimer expiration) recommended, it will be 
> reduced when it is too early, and increased when it is too late. The guest_tsc 
> and tsc_deadline are hard to equal, so we assume we are done when the delta 
> is within a small scope e.g. 100 cycles. This patch reduces latency 
> (kvm-unit-tests/tscdeadline_latency, busy waits, preemption_timer enabled)
> from ~2600 cyles to ~1200 cyles on our Skylake server.
> 
> Cc: Paolo Bonzini <pbonzini@...hat.com>
> Cc: Radim Krčmář <rkrcmar@...hat.com>
> Signed-off-by: Wanpeng Li <wanpengli@...cent.com>
> ---
> arch/x86/kvm/lapic.c | 7 +++++++
> arch/x86/kvm/x86.c   | 2 +-
> 2 files changed, 8 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c
> index fbb0e6d..b756f12 100644
> --- a/arch/x86/kvm/lapic.c
> +++ b/arch/x86/kvm/lapic.c
> @@ -70,6 +70,8 @@
> #define APIC_BROADCAST			0xFF
> #define X2APIC_BROADCAST		0xFFFFFFFFul
> 
> +static bool __read_mostly lapic_timer_advance_adjust_done = false;
> +
> static inline int apic_test_vector(int vec, void *bitmap)
> {
> 	return test_bit(VEC_POS(vec), (bitmap) + REG_POS(vec));
> @@ -1492,6 +1494,11 @@ void wait_lapic_expire(struct kvm_vcpu *vcpu)
> 	if (guest_tsc < tsc_deadline)
> 		__delay(min(tsc_deadline - guest_tsc,
> 			nsec_to_cycles(vcpu, lapic_timer_advance_ns)));
> +	if (!lapic_timer_advance_adjust_done) {
> +		lapic_timer_advance_ns += (s64)(guest_tsc - tsc_deadline) / 8;

I don’t understand how this “/ 8” converts between guest TSC units to host nanoseconds.

I think that instead you should do something like:
s64 ns = (s64)(guest_tsc - tsc_deadline) * 1000000ULL;
do_div(ns, vcpu->arch.virtual_tsc_khz);
lapic_timer_advance_ns += ns;

> +		if (abs(guest_tsc - tsc_deadline) < 100)

I would put this “100” hard-coded value as some “#define” to make code more clear.

> +			lapic_timer_advance_adjust_done = true;
> +	}
> }
> 
> static void start_sw_tscdeadline(struct kvm_lapic *apic)
> diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
> index edbf00e..e865d12 100644
> --- a/arch/x86/kvm/x86.c
> +++ b/arch/x86/kvm/x86.c
> @@ -136,7 +136,7 @@ static u32 __read_mostly tsc_tolerance_ppm = 250;
> module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
> 
> /* lapic timer advance (tscdeadline mode only) in nanoseconds */
> -unsigned int __read_mostly lapic_timer_advance_ns = 0;
> +unsigned int lapic_timer_advance_ns = 1000;
> module_param(lapic_timer_advance_ns, uint, S_IRUGO | S_IWUSR);
> EXPORT_SYMBOL_GPL(lapic_timer_advance_ns);
> 
> -- 
> 2.7.4
>