lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Tue, 9 Oct 2018 15:28:29 -0500
From:   Grygorii Strashko <grygorii.strashko@...com>
To:     Andrew Lunn <andrew@...n.ch>
CC:     "David S. Miller" <davem@...emloft.net>, <netdev@...r.kernel.org>,
        Tony Lindgren <tony@...mide.com>,
        Rob Herring <robh+dt@...nel.org>,
        Kishon Vijay Abraham I <kishon@...com>,
        Sekhar Nori <nsekhar@...com>, <linux-kernel@...r.kernel.org>,
        <linux-omap@...r.kernel.org>, <devicetree@...r.kernel.org>
Subject: Re: [RFC PATCH 05/11] net: ethernet: ti: cpsw: add support for port
 interface mode selection phy

Hi Andrew,

On 10/08/2018 07:50 PM, Andrew Lunn wrote:
>>   	/* Configure GMII_SEL register */
>> -	cpsw_phy_sel(cpsw->dev, slave->phy->interface, slave->slave_num);
>> +	if (!IS_ERR(slave->data->ifphy))
>> +		phy_set_netif_mode(slave->data->ifphy, slave->data->phy_if);
> 
> Is slave->data->phy_if also passed to phy_connect()? So you are going
> to end up with both the MAC and the PHY inserting RGMII delays, and it
> not working.

No. This logic not changed comparing to how it was.

  * "rgmii" (RX and TX delays are added by the MAC when required)

rgmii_id = 0 --> CPSW: 0 : Internal Delay, PHY - no delay

  * "rgmii-id" (RGMII with internal RX and TX delays provided by the PHY, the
     MAC should not add the RX or TX delays in this case)
  * "rgmii-rxid" (RGMII with internal RX delay provided by the PHY, the MAC
     should not add an RX delay in this case)
  * "rgmii-txid" (RGMII with internal TX delay provided by the PHY, the MAC
     should not add an TX delay in this case)

rgmii_id = 1 --> CPSW: 1 : No Internal Delay, PHY/board -  delay

> 
> You need to somehow decide if the MAC is going to do the delay, or the
> PHY. But not both.

Again, this series does not change logic - only interfaces and DT.

Thank you for review.

-- 
regards,
-grygorii

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ