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Message-ID: <87y3b72xxl.fsf@gmail.com>
Date: Tue, 09 Oct 2018 12:53:42 +0200
From: Esben Haabendal <esben.haabendal@...il.com>
To: Chuanhua Han <chuanhua.han@....com>
Cc: Boris Brezillon <boris.brezillon@...tlin.com>,
"broonie\@kernel.org" <broonie@...nel.org>,
"linux-spi\@vger.kernel.org" <linux-spi@...r.kernel.org>,
"linux-kernel\@vger.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 1/2] spi: spi-mem: Add the spi_set_xfer_bpw function
Chuanhua Han <chuanhua.han@....com> writes:
> 1. In the dspi driver (spi controller), bits_per_word (dspi->bits_per_word =
> transfer->bits_per_word) passed from the upper layer (spi-mem.c) is used.
> In this way, I can only assign the appropriate value of
> transfer->bits_per_word before passing to the controller, that is, the
> controller driver does not
> know the value of bits_per_word, and it will use this value when the upper
> level sets what value is passed.
Yes, the upper layer (spi-mem.c) should set ->bits_per_word according to
how the SPI data is to be transfered on the wire. In this case (I
haven't looked at spi-mem.c myself), it sounds like the desired value is
8. So it is set to 8, and that should definitely not be changed by dspi
driver.
> 2. As I understand, bits_per_word does not exist for non-byte alignment, but
> for the need to reserve non-byte transmission mode that meets the
> controller.
Where did you get that understanding from? The bits_per_word value
defines the word size in bits for all transfers.
> 3. In addition, now the XSPI of dspi cannot transfer data normally, so this
> problem needs to be solved. As for the DMA transfer mode, some colleagues will
> study it.
What do you mean that "XSPI of dspi cannot tranffer data normally"?
What specific problems do you see (with unpatched mainline kernel)?
/Esben
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