[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <71027b95-e1d2-c9fd-06fd-03685acca08a@aol.com>
Date: Sat, 13 Oct 2018 15:30:05 +0800
From: Gao Xiang <hsiangkao@....com>
To: Greg Kroah-Hartman <gregkh@...uxfoundation.org>
Cc: Philippe Ombredanne <pombredanne@...b.com>,
Kate Stewart <kstewart@...uxfoundation.org>,
Thomas Gleixner <tglx@...utronix.de>,
linux-kernel@...r.kernel.org, Miao Xie <miaoxie@...wei.com>,
Chao Yu <chao@...nel.org>
Subject: Re: [RFC PATCH] bit_spinlock: introduce smp_cond_load_relaxed
On 2018/10/13 15:22, Gao Xiang wrote:
> For other architectures like x86/arm64, I think they could implement
> smp_cond_load_* later.
Sorry about that, I mean "amd64".
Actually I don't have performance numbers to proof that now. I think
it really depends on the detailed architecture hardware implementation.
In my opinion, I just think it is better to wrap it up rather than
do open-coded all around...
do {
cpu_relax()
} while(...);
I was just cleaning up EROFS file system, and saw these piece of code
(bit_spinlock) by chance. Therefore I write a patch to get some idea
about it....
Thanks,
Gao Xiang
Powered by blists - more mailing lists