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Message-ID: <CA+M3ks4L_Cs_GB2sxg1XyygLz79eH7d+JcgLULM3fFN0U=YCZw@mail.gmail.com>
Date: Mon, 15 Oct 2018 13:15:00 +0200
From: Benjamin Gaignard <benjamin.gaignard@...aro.org>
To: Yannick Fertre <yannick.fertre@...com>
Cc: Philippe Cornu <philippe.cornu@...com>,
Benjamin GAIGNARD <benjamin.gaignard@...com>,
Vincent Abriou <vincent.abriou@...com>,
Gustavo Padovan <gustavo@...ovan.org>,
Maarten Lankhorst <maarten.lankhorst@...ux.intel.com>,
sean@...rly.run, David Airlie <airlied@...ux.ie>,
ML dri-devel <dri-devel@...ts.freedesktop.org>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v1 1/2] drm: Add missing flags for pixel clock & data enable
Le lun. 24 sept. 2018 à 13:59, Yannick Fertré <yannick.fertre@...com> a écrit :
>
> Add missing flags for pixel clock & data enable polarities.
> These flags are similar to other synchronization signals (hsync, vsync...).
>
> Signed-off-by: Yannick Fertré <yannick.fertre@...com>
Reviewed-by: Benjamin Gaignard <benjamin.gaignard@...aro.org>
> ---
> drivers/gpu/drm/drm_modes.c | 19 ++++++++++++++++++-
> include/uapi/drm/drm_mode.h | 6 ++++++
> 2 files changed, 24 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/drm_modes.c b/drivers/gpu/drm/drm_modes.c
> index 02db9ac..596f8b3 100644
> --- a/drivers/gpu/drm/drm_modes.c
> +++ b/drivers/gpu/drm/drm_modes.c
> @@ -130,7 +130,7 @@ EXPORT_SYMBOL(drm_mode_probed_add);
> * according to the hdisplay, vdisplay, vrefresh.
> * It is based from the VESA(TM) Coordinated Video Timing Generator by
> * Graham Loveridge April 9, 2003 available at
> - * http://www.elo.utfsm.cl/~elo212/docs/CVTd6r1.xls
> + * http://www.elo.utfsm.cl/~elo212/docs/CVTd6r1.xls
> *
> * And it is copied from xf86CVTmode in xserver/hw/xfree86/modes/xf86cvt.c.
> * What I have done is to translate it by using integer calculation.
> @@ -611,6 +611,15 @@ void drm_display_mode_from_videomode(const struct videomode *vm,
> dmode->flags |= DRM_MODE_FLAG_DBLSCAN;
> if (vm->flags & DISPLAY_FLAGS_DOUBLECLK)
> dmode->flags |= DRM_MODE_FLAG_DBLCLK;
> + if (vm->flags & DISPLAY_FLAGS_PIXDATA_POSEDGE)
> + dmode->flags |= DRM_MODE_FLAG_PPIXCLK;
> + else if (vm->flags & DISPLAY_FLAGS_PIXDATA_NEGEDGE)
> + dmode->flags |= DRM_MODE_FLAG_NPIXCLK;
> + if (vm->flags & DISPLAY_FLAGS_DE_HIGH)
> + dmode->flags |= DRM_MODE_FLAG_PDATAEN;
> + else if (vm->flags & DISPLAY_FLAGS_DE_LOW)
> + dmode->flags |= DRM_MODE_FLAG_NDE;
> +
> drm_mode_set_name(dmode);
> }
> EXPORT_SYMBOL_GPL(drm_display_mode_from_videomode);
> @@ -652,6 +661,14 @@ void drm_display_mode_to_videomode(const struct drm_display_mode *dmode,
> vm->flags |= DISPLAY_FLAGS_DOUBLESCAN;
> if (dmode->flags & DRM_MODE_FLAG_DBLCLK)
> vm->flags |= DISPLAY_FLAGS_DOUBLECLK;
> + if (dmode->flags & DRM_MODE_FLAG_PPIXDATA)
> + vm->flags |= DISPLAY_FLAGS_PIXDATA_POSEDGE;
> + else if (dmode->flags & DRM_MODE_FLAG_NPIXDATA)
> + vm->flags |= DISPLAY_FLAGS_PIXDATA_NEGEDGE;
> + if (dmode->flags & DRM_MODE_FLAG_PDE)
> + vm->flags |= DISPLAY_FLAGS_DE_HIGH;
> + else if (dmode->flags & DRM_MODE_FLAG_NDE)
> + vm->flags |= DISPLAY_FLAGS_DE_LOW;
> }
> EXPORT_SYMBOL_GPL(drm_display_mode_to_videomode);
>
> diff --git a/include/uapi/drm/drm_mode.h b/include/uapi/drm/drm_mode.h
> index d3e0fe3..b335a17 100644
> --- a/include/uapi/drm/drm_mode.h
> +++ b/include/uapi/drm/drm_mode.h
> @@ -89,6 +89,12 @@ extern "C" {
> #define DRM_MODE_FLAG_3D_TOP_AND_BOTTOM (7<<14)
> #define DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF (8<<14)
>
> +/* flags for polarity clock & data enable polarities */
> +#define DRM_MODE_FLAG_PPIXDATA (1 << 19)
> +#define DRM_MODE_FLAG_NPIXDATA (1 << 20)
> +#define DRM_MODE_FLAG_PDE (1 << 21)
> +#define DRM_MODE_FLAG_NDE (1 << 22)
> +
> /* Picture aspect ratio options */
> #define DRM_MODE_PICTURE_ASPECT_NONE 0
> #define DRM_MODE_PICTURE_ASPECT_4_3 1
> --
> 2.7.4
>
> _______________________________________________
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> dri-devel@...ts.freedesktop.org
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