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Message-ID: <tip-8cad6c58c9effb59b830bcf0103d8267ad2e312d@git.kernel.org>
Date: Mon, 15 Oct 2018 08:09:53 -0700
From: tip-bot for Jan Kiszka <tipbot@...or.com>
To: linux-tip-commits@...r.kernel.org
Cc: jpoimboe@...hat.com, dave.hansen@...el.com,
torvalds@...ux-foundation.org, jan.kiszka@...mens.com,
dvlasenk@...hat.com, bp@...e.de, linux-mm@...ck.org,
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Subject: [tip:x86/urgent] x86/entry/32: Clear the CS high bits
Commit-ID: 8cad6c58c9effb59b830bcf0103d8267ad2e312d
Gitweb: https://git.kernel.org/tip/8cad6c58c9effb59b830bcf0103d8267ad2e312d
Author: Jan Kiszka <jan.kiszka@...mens.com>
AuthorDate: Mon, 15 Oct 2018 16:09:29 +0200
Committer: Borislav Petkov <bp@...e.de>
CommitDate: Mon, 15 Oct 2018 16:54:28 +0200
x86/entry/32: Clear the CS high bits
Even if not on an entry stack, the CS's high bits must be
initialized because they are unconditionally evaluated in
PARANOID_EXIT_TO_KERNEL_MODE.
Failing to do so broke the boot on Galileo Gen2 and IOT2000 boards.
[ bp: Make the commit message tone passive and impartial. ]
Fixes: b92a165df17e ("x86/entry/32: Handle Entry from Kernel-Mode on Entry-Stack")
Signed-off-by: Jan Kiszka <jan.kiszka@...mens.com>
Signed-off-by: Borislav Petkov <bp@...e.de>
Reviewed-by: Joerg Roedel <jroedel@...e.de>
Acked-by: Joerg Roedel <jroedel@...e.de>
CC: "H. Peter Anvin" <hpa@...or.com>
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CC: Jiri Kosina <jkosina@...e.cz>
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CC: Linus Torvalds <torvalds@...ux-foundation.org>
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Link: http://lkml.kernel.org/r/f271c747-1714-5a5b-a71f-ae189a093b8d@siemens.com
---
arch/x86/entry/entry_32.S | 13 +++++++------
1 file changed, 7 insertions(+), 6 deletions(-)
diff --git a/arch/x86/entry/entry_32.S b/arch/x86/entry/entry_32.S
index 2767c625a52c..fbbf1ba57ec6 100644
--- a/arch/x86/entry/entry_32.S
+++ b/arch/x86/entry/entry_32.S
@@ -389,6 +389,13 @@
* that register for the time this macro runs
*/
+ /*
+ * The high bits of the CS dword (__csh) are used for
+ * CS_FROM_ENTRY_STACK and CS_FROM_USER_CR3. Clear them in case
+ * hardware didn't do this for us.
+ */
+ andl $(0x0000ffff), PT_CS(%esp)
+
/* Are we on the entry stack? Bail out if not! */
movl PER_CPU_VAR(cpu_entry_area), %ecx
addl $CPU_ENTRY_AREA_entry_stack + SIZEOF_entry_stack, %ecx
@@ -407,12 +414,6 @@
/* Load top of task-stack into %edi */
movl TSS_entry2task_stack(%edi), %edi
- /*
- * Clear unused upper bits of the dword containing the word-sized CS
- * slot in pt_regs in case hardware didn't clear it for us.
- */
- andl $(0x0000ffff), PT_CS(%esp)
-
/* Special case - entry from kernel mode via entry stack */
#ifdef CONFIG_VM86
movl PT_EFLAGS(%esp), %ecx # mix EFLAGS and CS
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