linux-kernel - Re: [RFC 1/4] pwm: sifive: Add DT documentation for SiFive PWM Controller.

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite for Android: free password hash cracker in your pocket

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <20181016220437.GB31973@mithrandir>
Date:   Wed, 17 Oct 2018 00:04:38 +0200
From:   Thierry Reding <thierry.reding@...il.com>
To:     Paul Walmsley <paul.walmsley@...ive.com>
Cc:     Atish Patra <atish.patra@....com>,
        Rob Herring <robh+dt@...nel.org>, mark.rutland@....com,
        linux-pwm@...r.kernel.org, devicetree@...r.kernel.org,
        Wesley Terpstra <wesley@...ive.com>, linus.walleij@...aro.org,
        palmer@...ive.com, linux-kernel@...r.kernel.org, hch@...radead.org,
        linux-gpio@...r.kernel.org, linux-riscv@...ts.infradead.org
Subject: Re: [RFC 1/4] pwm: sifive: Add DT documentation for SiFive PWM
 Controller.

On Tue, Oct 16, 2018 at 10:31:42AM -0700, Paul Walmsley wrote:
> 
> On 10/16/18 4:01 AM, Thierry Reding wrote:
> > On Mon, Oct 15, 2018 at 03:57:35PM -0700, Atish Patra wrote:
> > > On 10/10/18 6:49 AM, Thierry Reding wrote:
> > > > On Tue, Oct 09, 2018 at 11:51:22AM -0700, Atish Patra wrote:
> > > > > +Required properties:
> > > > > +- compatible: should be one of
> > > > > +	"sifive,fu540-c000-pwm0","sifive,pwm0".
> > > > What's the '0' in here? A version number?
> > > > 
> > > I think yes. Since fu540 is the first Linux capable RISC-V core, SiFive Guys
> > > decided mark it as version 0.
> > > 
> > > @Wesly: Please correct me if I am wrong.
> > It seems fairly superfluous to me to have a version number in additon to
> > the fu540-c000, which already seems to be the core plus some sort of
> > part number. Do you really expect there to be any changes in the SoC
> > that would require a different compatible string at this point? If the
> > SoC has taped out, how will you ever get a different version of the PWM
> > IP in it?
> > 
> > I would expect any improvements or changes to the PWM IP to show up in a
> > different SoC generation, at which point it would be something like
> > "sifive,fu640-c000" maybe, or perhaps "sifive,fu540-d000", or whatever
> > the numbering is.
> 
> 
> The "0" suffix refers to a revision number for the underlying PWM IP block.
> 
> It's certainly important to keep that version number on the "sifive,pwm0"
> compatible string that doesn't have the chip name associated with it.

Isn't the hardware identified by "sifive,pwm0" and "sifive,fu540-c000"
effectively identical? Is there a need to have two compatible strings
that refer to the exact same hardware?

> As to whether there could ever be a FU540-C000 part with different IP block
> versions on it: FU540-C000 is ultimately a marketing name.  While
> theoretically we shouldn't have another "FU540-C000" chip with different
> peripheral IP block versions on it, I don't think any engineer can guarantee
> that it won't happen.

I would argue that if at some point there was indeed a chip with the
same name but a different IP block version in it, we can figure out what
to call it. Sure there are no guarantees, but it's still fairly unlikely
in my opinion, so I personally wouldn't worry about this up front.

Anyway, I don't feel strongly either way, I'm just pointing out that
this is somewhat unusual. If you want to keep it, feel free to.

Thierry

Download attachment "signature.asc" of type "application/pgp-signature" (834 bytes)