lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <CAJKOXPe4Jf3QVbQ6BFPFptkgvmmpNu+QCmDoD3JqhyYOidJ7vA@mail.gmail.com>
Date:   Tue, 16 Oct 2018 17:09:14 +0200
From:   Krzysztof Kozlowski <krzk@...nel.org>
To:     l.luba@...tner.samsung.com
Cc:     devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-doc@...r.kernel.org, linux-kernel@...r.kernel.org,
        linux-pm@...r.kernel.org, rui.zhang@...el.com, edubezval@...il.com,
        daniel.lezcano@...aro.org, robh+dt@...nel.org,
        mark.rutland@....com, corbet@....net,
        Bartłomiej Żołnierkiewicz 
        <b.zolnierkie@...sung.com>, kgene@...nel.org
Subject: Re: [PATCH 06/11] DT: arm64: exynos: add support for thermal trip irq-mode

On Tue, 16 Oct 2018 at 16:56, Lukasz Luba <l.luba@...tner.samsung.com> wrote:
>

Hi Lukasz,

Thanks for patches.

I did not receive the first patches in the series. It is okay (depends
on the context) but in such case sending cover letter to all people is
quite useful. It helps to understand the entire patchset. Since I did
not get them, I really do not know:
1. Whether DTS patches are independent?
2. How this fits in the big picture of Exynos thermal?


> This patch adds support for new flash which indicates

What is "flash"?

Please wrap your lines accordingly (75 characters like in
submitting-patches.rst). Current wrapping makes it more difficult to
read.

> that trip point triggers irq when temperature is met.
> Exynos5433 supports 8 trip point which will trigger irq.

"Exynos5433 supports 8 trip points which trigger interrupt."
(or IRQ but not irq)

> Above that number other trip points should be registered
> without 'irq-mode' flag.

Why they should be registered without irq-mode?

> That will force the thermal framework to start polling
> the temperature sensor under configured conditions and
> handle the trip point.

How does it fit into existing polling mode?

>
> Cc: Kukjin Kim <kgene@...nel.org>
> Cc: Krzysztof Kozlowski <krzk@...nel.org>
> Cc: devicetree@...r.kernel.org
> Cc: linux-arm-kernel@...ts.infradead.org
> Signed-off-by: Lukasz Luba <l.luba@...tner.samsung.com>
> ---
>  arch/arm64/boot/dts/exynos/exynos5433-tmu.dtsi | 105 ++++++++++++++++---------
>  1 file changed, 70 insertions(+), 35 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/exynos/exynos5433-tmu.dtsi b/arch/arm64/boot/dts/exynos/exynos5433-tmu.dtsi
> index fe3a0b1..c4330f6 100644
> --- a/arch/arm64/boot/dts/exynos/exynos5433-tmu.dtsi
> +++ b/arch/arm64/boot/dts/exynos/exynos5433-tmu.dtsi
> @@ -17,37 +17,44 @@ thermal-zones {
>                         atlas0_alert_0: atlas0-alert-0 {
>                                 temperature = <65000>;  /* millicelsius */
>                                 hysteresis = <1000>;    /* millicelsius */
> -                               type = "active";
> +                               type = "passive";

Change of active->passive looks irrelevant to this topic. Here and
everywhere else.

Best regards,
Krzysztof

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ