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Message-ID: <CAE=gft6W_gGXQRP++AMauHien4yG8TN3pOOgzKpND65KqMqy=w@mail.gmail.com>
Date:   Wed, 17 Oct 2018 16:36:31 -0700
From:   Evan Green <evgreen@...omium.org>
To:     Doug Anderson <dianders@...omium.org>
Cc:     robh+dt@...nel.org, kishon@...com, cang@...eaurora.org,
        vivek.gautam@...eaurora.org, Manu Gautam <mgautam@...eaurora.org>,
        linux-arm-msm@...r.kernel.org, sayali <sayalil@...eaurora.org>,
        varada@...eaurora.org, asutoshd@...eaurora.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        mark.rutland@....com
Subject: Re: [PATCH] dt-bindings: phy-qcom-qmp: Fix several mistakes from
 prior commits

On Fri, Oct 12, 2018 at 2:36 PM Douglas Anderson <dianders@...omium.org> wrote:
>
> Digging through the "phy-qcom-qmp" showed me many inconsistencies
> between the bindings and the reality of the driver.  Let's fix them
> all.
>
> * In commit 2d66eab18375 ("dt-bindings: phy: qmp: Add support for QMP
>   phy in IPQ8074") we probably should have explicitly listed that
>   there are no clocks for this PHY and also added the reset names in
>   alphabetical order.  You can see that there are no clocks in the
>   driver where "clk_list" is NULL.
>
> * In commit 8587b220f05e ("dt-bindings: phy-qcom-qmp: Update bindings
>   for QMP V3 USB PHY") we probably should have listed the resets for
>   this new PHY and also removed the "(Optional)" marking for the "cfg"
>   reset since PHYs that need "cfg" really do need it.  It's just that
>   not all PHYs need it.
>
> * In commit 7f0802074120 ("dt-bindings: phy-qcom-qmp: Update bindings
>   for sdm845") we forgot to update one instance of the string
>   "qcom,qmp-v3-usb3-phy" to be "qcom,sdm845-qmp-usb3-phy".  Let's fix
>   that.  We should also have added "qcom,sdm845-qmp-usb3-uni-phy" to
>   the clock-names and reset-names lists.
>
> * In commit 99c7c7364b71 ("dt-bindings: phy-qcom-qmp: Add UFS phy
>   compatible string for sdm845") we should have added the set of
>   clocks and resets for "qcom,sdm845-qmp-ufs-phy".  These were taken
>   from the driver.
>
> * Cleanup the wording for what properties child nodes have to make it
>   more obvious which types of PHYs need clocks and resets.  This was
>   sorta implicit in the "-names" description but I found myself
>   confused.
>
> * As per the code not all "pcie qmp phys" have resets.  Specifically
>   note that the "has_lane_rst" property in the driver is false for
>   "ipq8074-qmp-pcie-phy".  Thus make it clear exactly which PHYs need
>   child nodes with resets.
>
> Signed-off-by: Douglas Anderson <dianders@...omium.org>

Reviewed-by: Evan Green <evgreen@...omium.org>

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