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Message-ID: <20181017084117.26e25005@bbrezillon>
Date: Wed, 17 Oct 2018 08:41:17 +0200
From: Boris Brezillon <boris.brezillon@...tlin.com>
To: masonccyang@...c.com.tw
Cc: broonie@...nel.org, tpiepho@...inj.com,
linux-kernel@...r.kernel.org, linux-spi@...r.kernel.org,
juliensu@...c.com.tw, zhengxunli@...c.com.tw,
Rob Herring <robh@...nel.org>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>
Subject: Re: [PATCH v6 2/2] dt-binding: spi: Document Macronix controller
bindings
+Rob and the DT ML
Hi Mason,
Remember to Cc the DT mailing list and maintainers when you add/update a
binding.
On Wed, 17 Oct 2018 10:08:12 +0800
masonccyang@...c.com.tw wrote:
> From: Mason Yang <masonccyang@...c.com.tw>
>
> Document the bindings used by the Macronix controller.
>
> Signed-off-by: Mason Yang <masonccyang@...c.com.tw>
> ---
> Documentation/devicetree/bindings/spi/spi-mxic.txt | 34 ++++++++++++++++++++++
> 1 file changed, 34 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/spi/spi-mxic.txt
>
> diff --git a/Documentation/devicetree/bindings/spi/spi-mxic.txt b/Documentation/devicetree/bindings/spi/spi-mxic.txt
> new file mode 100644
> index 0000000..529f2da
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/spi/spi-mxic.txt
> @@ -0,0 +1,34 @@
> +Macronix SPI controller Device Tree Bindings
> +--------------------------------------------
> +
> +Required properties:
> +- compatible: should be "mxicy,mx25f0a-spi"
> +- #address-cells: should be 1
> +- #size-cells: should be 0
> +- reg: should contain 2 entries, one for the registers and one for the direct
> + mapping area
> +- reg-names: should contain "regs" and "dirmap"
> +- interrupts: interrupt line connected to the SPI controller
> +- clock-names: should contain "ps_clk", "send_clk" and "send_dly_clk"
The _clk suffix is unnecessary in my opinion. How about:
- clock-names: should contain "ps", "send" and "send_dly"
Other than that,
Reviewed-by: Boris Brezillon <boris.brezillon@...tlin.com>
> +- clocks: should contain 3 entries for the "ps_clk", "send_clk" and
> + "send_dly_clk" clocks
> +
> +Example:
> +
> + spi@...30000 {
> + compatible = "mxicy,mx25f0a-spi";
> + reg = <0x43c30000 0x10000>, <0xa0000000 0x20000000>;
> + reg-names = "regs", "dirmap";
> + clocks = <&clkwizard 0>, <&clkwizard 1>, <&clkc 18>;
> + clock-names = "send_clk", "send_dly_clk", "ps_clk";
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + flash@0 {
> + compatible = "jedec,spi-nor";
> + reg = <0>;
> + spi-max-frequency = <25000000>;
> + spi-tx-bus-width = <4>;
> + spi-rx-bus-width = <4>;
> + };
> + };
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