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Message-ID: <1539769019-32107-1-git-send-email-shun-chih.yu@mediatek.com>
Date: Wed, 17 Oct 2018 17:36:57 +0800
From: <shun-chih.yu@...iatek.com>
To: Sean Wang <sean.wang@...iatek.com>, Vinod Koul <vkoul@...nel.org>,
"Rob Herring" <robh+dt@...nel.org>,
Matthias Brugger <matthias.bgg@...il.com>,
"Dan Williams" <dan.j.williams@...el.com>
CC: <dmaengine@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-mediatek@...ts.infradead.org>, <devicetree@...r.kernel.org>,
<linux-kernel@...r.kernel.org>, <srv_wsdupstream@...iatek.com>
Subject: [PATCH v2] add support for Mediatek Command-Queue DMA controller on MT6765 SoC
Changes since v1:
- remove unused macros, typos
- leverage ASYNC_TX_ENABLE_CHANNEL_SWITCH to maintain DMA descriptor list
This patchset introduces support for MediaTek Command-Queue DMA controller.
MediaTek Command-Queue DMA controller (CQDMA) on MT6765 SoC is dedicated to memory-to-memory transfer through queue-based descriptor management.
There are only 3 physical channels inside CQDMA, while the driver is extended to support 32 virtual channels for multiple dma users to issue dma requests onto the CQDMA simultaneously.
Shun-Chih Yu (2):
dt-bindings: dmaengine: Add MediaTek Command-Queue DMA controller
bindings
dmaengine: mediatek: Add MediaTek Command-Queue DMA controller for
MT6765 SoC
.../devicetree/bindings/dma/mtk-cqdma.txt | 31 +
drivers/dma/mediatek/Kconfig | 13 +
drivers/dma/mediatek/Makefile | 1 +
drivers/dma/mediatek/mtk-cqdma.c | 943 ++++++++++++++++++++
4 files changed, 988 insertions(+)
create mode 100644 Documentation/devicetree/bindings/dma/mtk-cqdma.txt
create mode 100644 drivers/dma/mediatek/mtk-cqdma.c
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