linux-kernel - Re: [PATCH v5 2/2] mtd: rawnand: meson: add support for Amlogic NAND flash controller

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite for Android: free password hash cracker in your pocket

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <3e462d23-a100-6eb2-3740-abe2373a8e15@amlogic.com>
Date:   Fri, 19 Oct 2018 16:30:48 +0800
From:   Liang Yang <liang.yang@...ogic.com>
To:     Boris Brezillon <boris.brezillon@...tlin.com>
CC:     Jianxin Pan <jianxin.pan@...ogic.com>,
        <linux-mtd@...ts.infradead.org>, Rob Herring <robh@...nel.org>,
        Hanjie Lin <hanjie.lin@...ogic.com>,
        Victor Wan <victor.wan@...ogic.com>,
        Neil Armstrong <narmstrong@...libre.com>,
        Martin Blumenstingl <martin.blumenstingl@...glemail.com>,
        Richard Weinberger <richard@....at>,
        Yixun Lan <yixun.lan@...ogic.com>,
        <linux-kernel@...r.kernel.org>,
        Marek Vasut <marek.vasut@...il.com>,
        Jian Hu <jian.hu@...ogic.com>,
        Kevin Hilman <khilman@...libre.com>,
        Carlo Caione <carlo@...one.org>,
        <linux-amlogic@...ts.infradead.org>,
        Brian Norris <computersforpeace@...il.com>,
        David Woodhouse <dwmw2@...radead.org>,
        <linux-arm-kernel@...ts.infradead.org>,
        Jerome Brunet <jbrunet@...libre.com>
Subject: Re: [PATCH v5 2/2] mtd: rawnand: meson: add support for Amlogic NAND
 flash controller



On 2018/10/19 16:10, Boris Brezillon wrote:
> On Fri, 19 Oct 2018 15:29:05 +0800
> Liang Yang <liang.yang@...ogic.com> wrote:
> 
>>> How about defining that the HW returns an array of __le64 instead and then
>>> define the following macros which you can use after converting in the
>>> CPU endianness
>>>
>>> #define ECC_GET_PROTECTED_OOB_BYTE(x, y)	(((x) >> (8 * (1 + y)) & GENMASK(7, 0))
>>> #define ECC_COMPLETE			BIT(31)
>>> #define ECC_ERR_CNT(x)			(((x) >> 24) & GENMASK(5, 0))
>>>
>>> (I'm not entirely sure the field positions are correct, but I'll let you
>>> check that).
>>>    
>> ok. i think it should be:
>>
>> #define ECC_GET_PROTECTED_OOB_BYTE(x, y)	(((x) >> (8 * y) &
>> GENMASK(7, 0))
>>
>> if x represents the u64 and y represents the index of the u64.
> 
> Absolutely.
> 
>>
>>
>>
>>>> +
>>>> +#define PER_INFO_BYTE	(sizeof(struct meson_nfc_info_format))
>>>> +
>>>> +struct meson_nfc_nand_chip {
>>>> +	struct list_head node;
>>>> +	struct nand_chip nand;
>>>> +	bool is_scramble;
>>>
>>> I think I already mentioned the NAND_NEED_SCRAMBLING flag []. Please
>>> drop this field and test (chip->flags & NAND_NEED_SCRAMBLING) instead.
>>>    
>> em, i use NAND_NEED_SCRAMBLING and is_scramble is set:
>> static int meson_nand_attach_chip(struct nand_chip *nand)
>> {
>> 	......
>> 	meson_chip->is_scramble =
>> 		(nand->options & NAND_NEED_SCRAMBLING) ? 1 : 0;
>> 	......
>> }
> 
> Why do you need to add a new field then? Just test
> nand->options & NAND_NEED_SCRAMBLING directly or provide a helper
> function that does that.
> 
ok, i will fix it.
> .
>