linux-kernel - RE: [PATCH 3/3] reset: reset-zynqmp: Adding support for Xilinx zynqmp reset controller.

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [day] [month] [year] [list]

Message-ID: <BYAPR02MB47108BCDC1AF5454F2DDF328C2F90@BYAPR02MB4710.namprd02.prod.outlook.com>
Date:   Fri, 19 Oct 2018 09:20:58 +0000
From:   Nava kishore Manne <navam@...inx.com>
To:     Philipp Zabel <p.zabel@...gutronix.de>,
        "robh+dt@...nel.org" <robh+dt@...nel.org>,
        "mark.rutland@....com" <mark.rutland@....com>,
        Michal Simek <michals@...inx.com>,
        Rajan Vaja <RAJANV@...inx.com>, Jolly Shah <JOLLYS@...inx.com>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "chinnikishore369@...il.com" <chinnikishore369@...il.com>
Subject: RE: [PATCH 3/3] reset: reset-zynqmp: Adding support for Xilinx zynqmp
 reset controller.

Hi Philipp

Thanks for the quicks response....

> -----Original Message-----
> From: Philipp Zabel [mailto:p.zabel@...gutronix.de]
> Sent: Friday, October 19, 2018 2:33 PM
> To: Nava kishore Manne <navam@...inx.com>; robh+dt@...nel.org;
> mark.rutland@....com; Michal Simek <michals@...inx.com>; Rajan Vaja
> <RAJANV@...inx.com>; Jolly Shah <JOLLYS@...inx.com>;
> devicetree@...r.kernel.org; linux-arm-kernel@...ts.infradead.org; linux-
> kernel@...r.kernel.org; chinnikishore369@...il.com
> Subject: Re: [PATCH 3/3] reset: reset-zynqmp: Adding support for Xilinx
> zynqmp reset controller.
> 
> Hi Nava,
> 
> On Sat, 2018-10-20 at 14:11 +0530, Nava kishore Manne wrote:
> > Add a reset controller driver for Xilinx Zynq UltraScale+ MPSoC.
> > The zynqmp reset-controller has the ability to reset lines connected
> > to different blocks and peripheral in the Soc.
> >
> > Signed-off-by: Nava kishore Manne <nava.manne@...inx.com>
> > ---
> > Changes for v1:
> > 		-None.
> 
> I had comments on RFC v3 that are not addressed yet, see below.
> 

Sorry, I have missed your comments . Will fix in the next version.

Regards,
Navakishore.