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Message-ID: <DM5PR02MB218754E3827458E08060DDF2DCF90@DM5PR02MB2187.namprd02.prod.outlook.com>
Date: Fri, 19 Oct 2018 10:38:54 +0000
From: Appana Durga Kedareswara Rao <appanad@...inx.com>
To: Radhey Shyam Pandey <radheys@...inx.com>,
"vkoul@...nel.org" <vkoul@...nel.org>,
"dan.j.williams@...el.com" <dan.j.williams@...el.com>,
Michal Simek <michals@...inx.com>,
Radhey Shyam Pandey <radheys@...inx.com>
CC: "dmaengine@...r.kernel.org" <dmaengine@...r.kernel.org>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: RE: [PATCH v2 4/4] dmaengine: xilinx_dma: Fix 64-bit simple CDMA
transfer
> -----Original Message-----
> From: Radhey Shyam Pandey <radhey.shyam.pandey@...inx.com>
> Sent: Saturday, September 29, 2018 10:48 PM
> To: vkoul@...nel.org; dan.j.williams@...el.com; Michal Simek
> <michals@...inx.com>; Appana Durga Kedareswara Rao
> <appanad@...inx.com>; Radhey Shyam Pandey <radheys@...inx.com>
> Cc: dmaengine@...r.kernel.org; linux-arm-kernel@...ts.infradead.org; linux-
> kernel@...r.kernel.org
> Subject: [PATCH v2 4/4] dmaengine: xilinx_dma: Fix 64-bit simple CDMA
> transfer
>
> In AXI CDMA simple mode also pass MSB bits of source and destination
> address to xilinx_write function. This fixes simple CDMA operation mode using
> 64-bit addressing.
>
> Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@...inx.com>
> Signed-off-by: Michal Simek <michal.simek@...inx.com>
Reviewed-by: Appana Durga Kedareswara Rao <appana.durga.rao@...inx.com>
Regards,
Kedar.
> ---
> Changes for v2:
> Use helper macro for preparing dma_addr_t.
> ---
> drivers/dma/xilinx/xilinx_dma.c | 6 ++++--
> 1 files changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/dma/xilinx/xilinx_dma.c b/drivers/dma/xilinx/xilinx_dma.c
> index c27ab64..d04ef85 100644
> --- a/drivers/dma/xilinx/xilinx_dma.c
> +++ b/drivers/dma/xilinx/xilinx_dma.c
> @@ -1247,8 +1247,10 @@ static void xilinx_cdma_start_transfer(struct
> xilinx_dma_chan *chan)
>
> hw = &segment->hw;
>
> - xilinx_write(chan, XILINX_CDMA_REG_SRCADDR, hw-
> >src_addr);
> - xilinx_write(chan, XILINX_CDMA_REG_DSTADDR, hw-
> >dest_addr);
> + xilinx_write(chan, XILINX_CDMA_REG_SRCADDR,
> + xilinx_prep_dma_addr_t(hw->src_addr));
> + xilinx_write(chan, XILINX_CDMA_REG_DSTADDR,
> + xilinx_prep_dma_addr_t(hw->dest_addr));
>
> /* Start the transfer */
> dma_ctrl_write(chan, XILINX_DMA_REG_BTT,
> --
> 1.7.1
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