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Message-Id: <20181019184827.12351-2-paul.walmsley@sifive.com>
Date: Fri, 19 Oct 2018 11:48:27 -0700
From: Paul Walmsley <paul.walmsley@...ive.com>
To: linux-serial@...r.kernel.org
Cc: Paul Walmsley <paul.walmsley@...ive.com>,
devicetree@...r.kernel.org, linux-riscv@...ts.infradead.org,
linux-kernel@...r.kernel.org,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Rob Herring <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>,
Palmer Dabbelt <palmer@...ive.com>,
Paul Walmsley <paul@...an.com>
Subject: [PATCH v2 1/2] dt-bindings: serial: add documentation for the SiFive UART driver
Add DT binding documentation for the Linux driver for the SiFive
asynchronous serial IP block. Nothing too exotic.
Cc: linux-serial@...r.kernel.org
Cc: devicetree@...r.kernel.org
Cc: linux-riscv@...ts.infradead.org
Cc: linux-kernel@...r.kernel.org
Cc: Greg Kroah-Hartman <gregkh@...uxfoundation.org>
Cc: Rob Herring <robh+dt@...nel.org>
Cc: Mark Rutland <mark.rutland@....com>
Cc: Palmer Dabbelt <palmer@...ive.com>
Reviewed-by: Palmer Dabbelt <palmer@...ive.com>
Signed-off-by: Paul Walmsley <paul.walmsley@...ive.com>
Signed-off-by: Paul Walmsley <paul@...an.com>
---
.../bindings/serial/sifive-serial.txt | 21 +++++++++++++++++++
1 file changed, 21 insertions(+)
create mode 100644 Documentation/devicetree/bindings/serial/sifive-serial.txt
diff --git a/Documentation/devicetree/bindings/serial/sifive-serial.txt b/Documentation/devicetree/bindings/serial/sifive-serial.txt
new file mode 100644
index 000000000000..8982338512f5
--- /dev/null
+++ b/Documentation/devicetree/bindings/serial/sifive-serial.txt
@@ -0,0 +1,21 @@
+SiFive asynchronous serial interface (UART)
+
+Required properties:
+
+- compatible: should be "sifive,fu540-c000-uart0" or "sifive,uart0"
+- reg: address and length of the register space
+- interrupt-parent: should contain a phandle pointing to the SoC interrupt
+ controller device node that the UART interrupts are connected to
+- interrupts: Should contain the UART interrupt identifier
+- clocks: Should contain a clock identifier for the UART's parent clock
+
+
+Example:
+
+uart0: serial@...10000 {
+ compatible = "sifive,uart0";
+ interrupt-parent = <&plic0>;
+ interrupts = <80>;
+ reg = <0x0 0x10010000 0x0 0x1000>;
+ clocks = <&prci PRCI_CLK_TLCLK>;
+};
--
2.19.1
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