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Date:   Wed, 24 Oct 2018 13:13:44 +0300
From:   Alexander Shishkin <alexander.shishkin@...ux.intel.com>
To:     Luwei Kang <luwei.kang@...el.com>, kvm@...r.kernel.org,
        x86@...nel.org
Cc:     tglx@...utronix.de, mingo@...hat.com, bp@...en8.de, hpa@...or.com,
        pbonzini@...hat.com, rkrcmar@...hat.com, joro@...tes.org,
        songliubraving@...com, peterz@...radead.org,
        kstewart@...uxfoundation.org, gregkh@...uxfoundation.org,
        thomas.lendacky@....com, konrad.wilk@...cle.com,
        mattst88@...il.com, Janakarajan.Natarajan@....com,
        dwmw@...zon.co.uk, jpoimboe@...hat.com, marcorr@...gle.com,
        ubizjak@...il.com, sean.j.christopherson@...el.com,
        jmattson@...gle.com, linux-kernel@...r.kernel.org,
        Chao Peng <chao.p.peng@...ux.intel.com>,
        Luwei Kang <luwei.kang@...el.com>
Subject: Re: [PATCH v13 08/12] KVM: x86: Add Intel PT context switch for each vcpu

Luwei Kang <luwei.kang@...el.com> writes:

> +static void pt_guest_enter(struct vcpu_vmx *vmx)
> +{
> +	if (pt_mode == PT_MODE_SYSTEM)
> +		return;
> +
> +	/* Save host state before VM entry */
> +	rdmsrl(MSR_IA32_RTIT_CTL, vmx->pt_desc.host.ctl);
> +
> +	/*
> +	 * Set guest state of MSR_IA32_RTIT_CTL MSR (PT will be disabled
> +	 * on VM entry when it has been disabled in guest before).
> +	 */
> +	vmcs_write64(GUEST_IA32_RTIT_CTL, vmx->pt_desc.guest.ctl);
> +
> +	if (vmx->pt_desc.guest.ctl & RTIT_CTL_TRACEEN) {
> +		wrmsrl(MSR_IA32_RTIT_CTL, 0);
> +		pt_save_msr(&vmx->pt_desc.host, vmx->pt_desc.addr_range);
> +		pt_load_msr(&vmx->pt_desc.guest, vmx->pt_desc.addr_range);
> +	}
> +}

>From my side this is still a NAK, because [1].

[1] https://marc.info/?l=kvm&m=153847567226248&w=2

Thanks,
--
Alex

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