[<prev] [next>] [thread-next>] [day] [month] [year] [list]
Message-Id: <20181024125112.55999-1-kirill.shutemov@linux.intel.com>
Date: Wed, 24 Oct 2018 15:51:10 +0300
From: "Kirill A. Shutemov" <kirill.shutemov@...ux.intel.com>
To: tglx@...utronix.de, mingo@...hat.com, bp@...en8.de, hpa@...or.com,
dave.hansen@...ux.intel.com, luto@...nel.org, peterz@...radead.org
Cc: boris.ostrovsky@...cle.com, jgross@...e.com, bhe@...hat.com,
willy@...radead.org, x86@...nel.org, linux-mm@...ck.org,
linux-kernel@...r.kernel.org,
"Kirill A. Shutemov" <kirill.shutemov@...ux.intel.com>
Subject: [PATCHv2 0/2] Fix couple of issues with LDT remap for PTI
The patchset fixes issues with LDT remap for PTI:
- Layout collision due to KASLR with 5-level paging;
- Information leak via Meltdown-like attack;
Please review and consider applying.
v2:
- Rebase to the Linus' tree
+ fix conflict with new documentation of kernel memory layout
+ fix few mistakes in layout documentation
- Fix typo in commit message
Kirill A. Shutemov (2):
x86/mm: Move LDT remap out of KASLR region on 5-level paging
x86/ldt: Unmap PTEs for the slot before freeing LDT pages
Documentation/x86/x86_64/mm.txt | 34 +++++++-------
arch/x86/include/asm/page_64_types.h | 12 ++---
arch/x86/include/asm/pgtable_64_types.h | 4 +-
arch/x86/kernel/ldt.c | 59 ++++++++++++++++---------
arch/x86/xen/mmu_pv.c | 6 +--
5 files changed, 67 insertions(+), 48 deletions(-)
--
2.19.1
Powered by blists - more mailing lists