linux-kernel - [PATCH 0/2] x86: Enumerate direct stores instructions

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Message-Id: <1540418237-125817-1-git-send-email-fenghua.yu@intel.com>
Date:   Wed, 24 Oct 2018 14:57:15 -0700
From:   Fenghua Yu <fenghua.yu@...el.com>
To:     "Thomas Gleixner" <tglx@...utronix.de>,
        "Ingo Molnar" <mingo@...hat.com>, "H Peter Anvin" <hpa@...or.com>,
        "Ravi V Shankar" <ravi.v.shankar@...el.com>,
        "Ashok Raj" <ashok.raj@...el.com>
Cc:     "linux-kernel" <linux-kernel@...r.kernel.org>,
        "Fenghua Yu" <fenghua.yu@...el.com>
Subject: [PATCH 0/2] x86: Enumerate direct stores instructions

Direct stores instructionis MOVDIRI and MOVDIR64B will be available in
Tremont and other future x86 processors.

This patch set enumerates the instructions through CPUID.

GCC 8 implements intrinsics for the direct stores instructions.
User can try these instructions from GCC tree:
https://gcc.gnu.org/git/?p=gcc.git;a=summary
Before running the instructions, user needs to check availability of
the features by CPUID, or /proc/cpuinfo, etc.

Detailed information on the instructions and the MSR can be found in
the latest Intel Architecture Instruction Set Extensions and Future
Features Programming Reference at
https://software.intel.com/sites/default/files/managed/c5/15/architecture-instruction-set-extensions-programming-reference.pdf

Please note: this patch set was sent out with umonitor/umwait/tpause
instructions patches before. But since we find the other patches are not
fully ready yet, this time these direct stores instructions patches are
sent out separately.

Fenghua Yu (2):
  x86/cpufeatures: Enumerate MOVDIRI instruction
  x86/cpufeatures: Enumerate MOVDIR64B instruction

 arch/x86/include/asm/cpufeatures.h | 2 ++
 1 file changed, 2 insertions(+)

-- 
2.5.0