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Message-ID: <20181025215246.GA14861@bogus>
Date: Thu, 25 Oct 2018 16:52:46 -0500
From: Rob Herring <robh@...nel.org>
To: Xiaowei Bao <xiaowei.bao@....com>
Cc: bhelgaas@...gle.com, mark.rutland@....com, shawnguo@...nel.org,
leoyang.li@....com, kishon@...com, lorenzo.pieralisi@....com,
arnd@...db.de, gregkh@...uxfoundation.org, minghuan.Lian@....com,
mingkai.hu@....com, roy.zang@....com, kstewart@...uxfoundation.org,
cyrille.pitchen@...e-electrons.com, pombredanne@...b.com,
shawn.lin@...k-chips.com, niklas.cassel@...s.com,
linux-pci@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linuxppc-dev@...ts.ozlabs.org
Subject: Re: [PATCH 3/6] PCI: layerscape: Add the EP mode support
On Thu, Oct 25, 2018 at 07:08:58PM +0800, Xiaowei Bao wrote:
> Add the EP mode support.
>
> Signed-off-by: Xiaowei Bao <xiaowei.bao@....com>
> ---
> .../devicetree/bindings/pci/layerscape-pci.txt | 3 +++
> 1 files changed, 3 insertions(+), 0 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/pci/layerscape-pci.txt b/Documentation/devicetree/bindings/pci/layerscape-pci.txt
> index 66df1e8..d3d7be1 100644
> --- a/Documentation/devicetree/bindings/pci/layerscape-pci.txt
> +++ b/Documentation/devicetree/bindings/pci/layerscape-pci.txt
> @@ -13,12 +13,15 @@ information.
>
> Required properties:
> - compatible: should contain the platform identifier such as:
> + RC mode:
> "fsl,ls1021a-pcie", "snps,dw-pcie"
> "fsl,ls2080a-pcie", "fsl,ls2085a-pcie", "snps,dw-pcie"
> "fsl,ls2088a-pcie"
> "fsl,ls1088a-pcie"
> "fsl,ls1046a-pcie"
> "fsl,ls1012a-pcie"
> + EP mode:
> + "fsl,ls-pcie-ep"
You need SoC specific compatibles for the same reasons as the RC.
Rob
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