linux-kernel - Re: [PATCH v7 2/2] ThunderX2, perf : Add Cavium ThunderX2 SoC UNCORE PMU driver

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Date:   Thu, 25 Oct 2018 09:12:28 -0700
From:   Randy Dunlap <rdunlap@...radead.org>
To:     "Kulkarni, Ganapatrao" <Ganapatrao.Kulkarni@...ium.com>,
        "linux-doc@...r.kernel.org" <linux-doc@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>
Cc:     "Will.Deacon@....com" <Will.Deacon@....com>,
        "mark.rutland@....com" <mark.rutland@....com>,
        "suzuki.poulose@....com" <suzuki.poulose@....com>,
        "Nair, Jayachandran" <Jayachandran.Nair@...ium.com>,
        "Richter, Robert" <Robert.Richter@...ium.com>,
        "Lomovtsev, Vadim" <Vadim.Lomovtsev@...ium.com>,
        Jan Glauber <Jan.Glauber@...ium.com>,
        "gklkml16@...il.com" <gklkml16@...il.com>
Subject: Re: [PATCH v7 2/2] ThunderX2, perf : Add Cavium ThunderX2 SoC UNCORE
 PMU driver

On 10/24/18 10:59 PM, Kulkarni, Ganapatrao wrote:
> diff --git a/drivers/perf/Kconfig b/drivers/perf/Kconfig
> index 08ebaf7cca8b..c1956b1af2bb 100644
> --- a/drivers/perf/Kconfig
> +++ b/drivers/perf/Kconfig
> @@ -87,6 +87,15 @@ config QCOM_L3_PMU
>  	   Adds the L3 cache PMU into the perf events subsystem for
>  	   monitoring L3 cache events.
>  
> +config THUNDERX2_PMU
> +        tristate "Cavium ThunderX2 SoC PMU UNCORE"
> +	depends on ARCH_THUNDER2 && ARM64 && ACPI && NUMA
> +        default m
> +	help
> +	  Provides support for ThunderX2 UNCORE events.
> +	  The SoC has PMU support in its L3 cache controller (L3C) and
> +	  in the DDR4 Memory Controller (DMC).
> +
>  config XGENE_PMU
>          depends on ARCH_XGENE
>          bool "APM X-Gene SoC PMU"

Please fix the Kconfig indentation.  Use one tab (not spaces) for each of
tristate, depends, default, and help.  (yes, some of them are tabs and some
are spaces.)


-- 
~Randy