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Message-ID: <221ac544-b57a-e85f-79ac-0b914615c9a9@gmail.com>
Date:   Thu, 25 Oct 2018 21:36:33 +0300
From:   Dmitry Osipenko <digetx@...il.com>
To:     Thierry Reding <thierry.reding@...il.com>
Cc:     Peter De Schrijver <pdeschrijver@...dia.com>,
        Jonathan Hunter <jonathanh@...dia.com>,
        Prashant Gaikwad <pgaikwad@...dia.com>,
        linux-tegra@...r.kernel.org, linux-clk@...r.kernel.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v6 8/8] memory: tegra: Introduce Tegra20 EMC driver

On 10/25/18 5:38 PM, Thierry Reding wrote:
> On Sun, Oct 21, 2018 at 09:30:52PM +0300, Dmitry Osipenko wrote:
>> Introduce driver for the External Memory Controller (EMC) found on Tegra20
>> chips, which controls the external DRAM on the board. The purpose of this
>> driver is to program memory timing for external memory on the EMC clock
>> rate change.
>>
>> Signed-off-by: Dmitry Osipenko <digetx@...il.com>
>> Acked-by: Peter De Schrijver <pdeschrijver@...dia.com>
>> ---
>>  drivers/memory/tegra/Kconfig       |  10 +
>>  drivers/memory/tegra/Makefile      |   1 +
>>  drivers/memory/tegra/tegra20-emc.c | 591 +++++++++++++++++++++++++++++
>>  3 files changed, 602 insertions(+)
>>  create mode 100644 drivers/memory/tegra/tegra20-emc.c
> 
> Applied to for-4.21/memory, thanks.

Thank you! 

> Though I did notice that there's quite a bit of code that's very similar
> between this and the existing Tegra124 driver, so I wonder if we can do
> a pass over them and refactor some of it as a follow-up.
I don't think this will really worth the effort.

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