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Date:   Mon, 29 Oct 2018 18:10:47 +0530
From:   Jagan Teki <jagan@...nedev.com>
To:     maxime.ripard@...tlin.com, Jagan Teki <jagan@...rulasolutions.com>
Cc:     Chen-Yu Tsai <wens@...e.org>, Icenowy Zheng <icenowy@...c.io>,
        Jernej Skrabec <jernej.skrabec@...l.net>,
        Vasily Khoruzhick <anarsoul@...il.com>,
        Rob Herring <robh+dt@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        Catalin Marinas <catalin.marinas@....com>,
        Will Deacon <will.deacon@....com>,
        David Airlie <airlied@...ux.ie>,
        dri-devel <dri-devel@...ts.freedesktop.org>,
        Michael Turquette <mturquette@...libre.com>,
        Stephen Boyd <sboyd@...nel.org>,
        linux-clk <linux-clk@...r.kernel.org>,
        Michael Trimarchi <michael@...rulasolutions.com>,
        linux-arm-kernel <linux-arm-kernel@...ts.infradead.org>,
        devicetree <devicetree@...r.kernel.org>,
        linux-kernel <linux-kernel@...r.kernel.org>,
        linux-sunxi@...glegroups.com
Subject: Re: [linux-sunxi] Re: [PATCH v2 02/15] clk: sunxi-ng: Add check for
 minimal rate to NKM PLLs

On 29/10/18 2:28 PM, Maxime Ripard wrote:
> On Thu, Oct 25, 2018 at 04:25:59PM +0530, Jagan Teki wrote:
>> On Wed, Oct 24, 2018 at 11:34 PM Maxime Ripard
>> <maxime.ripard@...tlin.com> wrote:
>>>
>>> On Tue, Oct 23, 2018 at 09:20:22PM +0530, Jagan Teki wrote:
>>>> Some NKM PLLs doesn't work well when their output clock rate is set below
>>>> certain rate.
>>>>
>>>> So, add support for minimal rate for relevant PLLs.
>>>>
>>>> Signed-off-by: Jagan Teki <jagan@...rulasolutions.com>
>>>> ---
>>>> Changes for v2:
>>>> - new patch
>>>>
>>>>   drivers/clk/sunxi-ng/ccu_nkm.c | 7 +++++++
>>>>   drivers/clk/sunxi-ng/ccu_nkm.h | 1 +
>>>>   2 files changed, 8 insertions(+)
>>>>
>>>> diff --git a/drivers/clk/sunxi-ng/ccu_nkm.c b/drivers/clk/sunxi-ng/ccu_nkm.c
>>>> index 841840e35e61..d17539dc88dd 100644
>>>> --- a/drivers/clk/sunxi-ng/ccu_nkm.c
>>>> +++ b/drivers/clk/sunxi-ng/ccu_nkm.c
>>>> @@ -125,6 +125,13 @@ static unsigned long ccu_nkm_round_rate(struct ccu_mux_internal *mux,
>>>>        if (nkm->common.features & CCU_FEATURE_FIXED_POSTDIV)
>>>>                rate *= nkm->fixed_post_div;
>>>>
>>>> +     if (rate < nkm->min_rate) {
>>>> +             rate = nkm->min_rate;
>>>> +             if (nkm->common.features & CCU_FEATURE_FIXED_POSTDIV)
>>>> +                     rate /= nkm->fixed_post_div;
>>>
>>> I'm not sure this is right. Is the post divider taken into account to
>>> calculate the minimum, or is the minimum on the rate before the fixed
>>> post divider.
>>
>> Since we are returning from here, we need to take care post div which
>> is actually doing at the end of round_rate.
> 
> That's not my point though. Does the rate needs to be superior to min
> / post_div, or min?

ie what I'm trying to say, since it's common code min or max should / 
post_div and PLL_MIPI doesn't use any post_div.

We need to take care post_div though the current test (PLL_MIPI) in not 
used since it's common code. just like nkmp, nm etc.

> 
>>>
>>> How did you test this?
>>
>> I've not used this on PLL_MIPI atleast, so I didn't test this.
> 
> If you've never tested this, why are you adding that code?

Like above, it's common code. otherwise might effect.

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