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Message-ID: <20181105212049.GA320@bogus>
Date: Mon, 5 Nov 2018 15:20:49 -0600
From: Rob Herring <robh@...nel.org>
To: thesven73@...il.com
Cc: svendev@...x.com, linus.walleij@...aro.org, lee.jones@...aro.org,
mark.rutland@....com, afaerber@...e.de, treding@...dia.com,
david@...hnology.com, noralf@...nnes.org, johan@...nel.org,
monstr@...str.eu, michal.vokac@...ft.com, arnd@...db.de,
gregkh@...uxfoundation.org, john.garry@...wei.com,
geert+renesas@...der.be, robin.murphy@....com,
paul.gortmaker@...driver.com,
sebastien.bourdelin@...oirfairelinux.com, icenowy@...c.io,
stuyoder@...il.com, maxime.ripard@...tlin.com,
linux-kernel@...r.kernel.org, devicetree@...r.kernel.org
Subject: Re: [PATCH anybus v3 1/6] misc: support the Arcx anybus bridge
On Sun, Nov 04, 2018 at 10:54:56AM -0500, thesven73@...il.com wrote:
> From: Sven Van Asbroeck <svendev@...x.com>
>
> Add a driver for the Arcx anybus bridge.
>
> This chip embeds up to two Anybus-S application connectors
> (slots), and connects to the SoC via a parallel memory bus.
> There is also a CAN power readout, unrelated to the Anybus,
> modelled as a regulator.
bridge vs. host are confusing me as those are often the same thing. But
here bridge is just some auxilliary controls for the bus and the host is
the actual bus with devices? I'm not sure why you split this into 2 DT
nodes? How many devices are connected to the host processor (i.MX) bus?
Rob
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