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Message-ID: <20181106131119.GA9828@hirez.programming.kicks-ass.net>
Date: Tue, 6 Nov 2018 14:11:19 +0100
From: Peter Zijlstra <peterz@...radead.org>
To: Nadav Amit <namit@...are.com>
Cc: Ingo Molnar <mingo@...hat.com>,
LKML <linux-kernel@...r.kernel.org>, X86 ML <x86@...nel.org>,
"H. Peter Anvin" <hpa@...or.com>,
Thomas Gleixner <tglx@...utronix.de>,
Borislav Petkov <bp@...en8.de>,
Dave Hansen <dave.hansen@...ux.intel.com>,
Andy Lutomirski <luto@...nel.org>,
Kees Cook <keescook@...omium.org>,
Dave Hansen <dave.hansen@...el.com>,
Masami Hiramatsu <mhiramat@...nel.org>
Subject: Re: [PATCH v3 6/7] x86/alternatives: use temporary mm for text poking
On Tue, Nov 06, 2018 at 09:20:19AM +0100, Peter Zijlstra wrote:
> By our current way of thinking, kmap_atomic simply is not correct.
Something like the below; which weirdly builds an x86_32 kernel.
Although I imagine a very sad one.
---
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index ba7e3464ee92..e273f3879d04 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -1449,6 +1449,16 @@ config PAGE_OFFSET
config HIGHMEM
def_bool y
depends on X86_32 && (HIGHMEM64G || HIGHMEM4G)
+ depends on !SMP || BROKEN
+ help
+ By current thinking kmap_atomic() is broken, since it relies on per
+ CPU PTEs in the global (kernel) address space and relies on CPU local
+ TLB invalidates to completely invalidate these PTEs. However there is
+ nothing that guarantees other CPUs will not speculatively touch upon
+ 'our' fixmap PTEs and load then into their TLBs, after which our
+ local TLB invalidate will not invalidate them.
+
+ There are AMD chips that will #MC on inconsistent TLB states.
config X86_PAE
bool "PAE (Physical Address Extension) Support"
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