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Message-ID: <20181106172607.GT6218@tassilo.jf.intel.com>
Date: Tue, 6 Nov 2018 09:26:07 -0800
From: Andi Kleen <ak@...ux.intel.com>
To: Jiri Olsa <jolsa@...hat.com>
Cc: Milian Wolff <milian.wolff@...b.com>, linux-kernel@...r.kernel.org,
Jiri Olsa <jolsa@...nel.org>, namhyung@...nel.org,
linux-perf-users@...r.kernel.org,
Arnaldo Carvalho <acme@...nel.org>
Subject: Re: PEBS level 2/3 breaks dwarf unwinding! [WAS: Re: Broken dwarf
unwinding - wrong stack pointer register value?]
> hum, is this about having 'large pebs' or there's this window
> if there's also only single pebs record allowed? which should
> be case for dwarf unwind
With large PEBS today there is never any stack unwind because
stack unwinding can be only done from a PMI.
The window happens even with single PEBS. It's related
to the CPU being pipelined, so complex events may not
happen fully atomically.
-Andi
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