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Message-ID: <20181106172608.GB6217@localhost.localdomain>
Date:   Tue, 6 Nov 2018 10:26:08 -0700
From:   Keith Busch <keith.busch@...el.com>
To:     Lorenzo Pieralisi <lorenzo.pieralisi@....com>
Cc:     Bjorn Helgaas <helgaas@...nel.org>,
        Linux PCI <linux-pci@...r.kernel.org>,
        Bjorn Helgaas <bhelgaas@...gle.com>,
        Benjamin Herrenschmidt <benh@...nel.crashing.org>,
        Sinan Kaya <okaya@...nel.org>,
        Thomas Tai <thomas.tai@...cle.com>, poza@...eaurora.org,
        Lukas Wunner <lukas@...ner.de>, Christoph Hellwig <hch@....de>,
        Mika Westerberg <mika.westerberg@...ux.intel.com>,
        Catalin Marinas <catalin.marinas@....com>,
        Will Deacon <will.deacon@....com>,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 00/12] error handling and pciehp maintenance

On Tue, Nov 06, 2018 at 05:21:00PM +0000, Lorenzo Pieralisi wrote:
> If you have a simple reproducer for the bugs I am happy to help you test
> it (I can also apply arm64 DYNAMIC_FTRACE_WITH_REGS patches and test that
> new code path if that's the final direction we are taking).

The easiest way to reproduce is load the aer_inject module, inject an
error into a bridge, then remove the bridge and rescan.

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