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Message-ID: <f06f8c7b-9f32-43d7-4493-50fe940ecf75@monstr.eu>
Date:   Wed, 7 Nov 2018 15:14:56 +0100
From:   Michal Simek <monstr@...str.eu>
To:     Geert Uytterhoeven <geert+renesas@...der.be>,
        Jiri Kosina <trivial@...nel.org>
Cc:     linux-kernel@...r.kernel.org
Subject: Re: [PATCH trivial] microblaze: Typo s/use use/use/

On 07. 11. 18 14:47, Geert Uytterhoeven wrote:
> Signed-off-by: Geert Uytterhoeven <geert+renesas@...der.be>
> ---
>  arch/microblaze/include/asm/pgtable.h | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/microblaze/include/asm/pgtable.h b/arch/microblaze/include/asm/pgtable.h
> index f64ebb9c9a413535..bdfb2b3182b04c3b 100644
> --- a/arch/microblaze/include/asm/pgtable.h
> +++ b/arch/microblaze/include/asm/pgtable.h
> @@ -200,7 +200,7 @@ static inline pte_t pte_mkspecial(pte_t pte)	{ return pte; }
>   * is cleared in the TLB miss handler before the TLB entry is loaded.
>   * - All other bits of the PTE are loaded into TLBLO without
>   *  * modification, leaving us only the bits 20, 21, 24, 25, 26, 30 for
> - * software PTE bits.  We actually use use bits 21, 24, 25, and
> + * software PTE bits.  We actually use bits 21, 24, 25, and
>   * 30 respectively for the software bits: ACCESSED, DIRTY, RW, and
>   * PRESENT.
>   */
> 

Applied.
Thanks,
Michal

-- 
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Xilinx Microblaze
Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs
U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP SoCs




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