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Date: Wed, 7 Nov 2018 14:51:08 -0700
From: Lina Iyer <ilina@...eaurora.org>
To: linux-arm-msm@...r.kernel.org, andy.gross@...aro.org,
bjorn.andersson@...aro.org
Cc: rplsssn@...eaurora.org, linux-kernel@...r.kernel.org,
rnayak@...eaurora.org, devicetree@...r.kernel.org,
Lina Iyer <ilina@...eaurora.org>
Subject: [PATCH RESEND v3 1/2] arm64: dts: msm: add PDC device bindings for sdm845
Add PDC interrupt controller device bindings for SDM845.
Signed-off-by: Lina Iyer <ilina@...eaurora.org>
---
Changes in v3:
- Fix PDC map, use GIC SPI port number for hwirq
Changes in v2:
- Order by address
---
arch/arm64/boot/dts/qcom/sdm845.dtsi | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index b72bdb0a31a5..09f26ae9f803 100644
--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
@@ -1256,6 +1256,15 @@
#power-domain-cells = <1>;
};
+ pdc: interrupt-controller@...0000 {
+ compatible = "qcom,sdm845-pdc";
+ reg = <0xb220000 0x30000>;
+ qcom,pdc-ranges = <0 480 94>, <94 609 15>, <115 630 7>;
+ #interrupt-cells = <2>;
+ interrupt-parent = <&intc>;
+ interrupt-controller;
+ };
+
tsens0: thermal-sensor@...3000 {
compatible = "qcom,sdm845-tsens", "qcom,tsens-v2";
reg = <0xc263000 0x1ff>, /* TM */
--
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