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Date:   Wed, 07 Nov 2018 16:18:35 -0800
From:   Stephen Boyd <sboyd@...nel.org>
To:     Abel Vesa <abel.vesa@....com>
Cc:     Andrey Smirnov <andrew.smirnov@...il.com>,
        Anson Huang <anson.huang@....com>,
        "A.s. Dong" <aisheng.dong@....com>,
        Fabio Estevam <fabio.estevam@....com>,
        Lucas Stach <l.stach@...gutronix.de>,
        Rob Herring <robh@...nel.org>,
        Sascha Hauer <kernel@...gutronix.de>,
        dl-linux-imx <linux-imx@....com>, Abel Vesa <abelvesa@...ux.com>,
        Shawn Guo <shawnguo@...nel.org>,
        Sascha Hauer <s.hauer@...gutronix.de>,
        Michael Turquette <mturquette@...libre.com>,
        open list <linux-kernel@...r.kernel.org>,
        "moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" 
        <linux-arm-kernel@...ts.infradead.org>,
        "open list:COMMON CLK FRAMEWORK" <linux-clk@...r.kernel.org>
Subject: Re: [PATCH v9 3/5] clk: imx: add SCCG PLL type

Quoting Abel Vesa (2018-11-07 12:26:25)
> On Wed, Nov 07, 2018 at 11:01:02AM -0800, Stephen Boyd wrote:
> > 
> > 
> > What's the plan to clean it up?
> 
> So I'm doing this in our internal tree first to make sure I don't break the
> other (newer) socs.
> 
> I already have a prototype in testing but it's a long way to upstream it.
> 
> Basically, I'm replacing all of this with a single, more like a composite,
> more complex, clock type that does all the magic inside.
> 
> One of the problems is the fact that the bypasses can have the same sources
> and in my case, I'm implementing that as a list of parents name, but the
> parent names list doesn't work with duplicates, so I have to find some other
> way to do it.
> 
> Once I have something clean and tested enough I'll send it upstream.

Ok. Thanks for the info.

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