[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-Id: <20181108175049.7090-5-vkoul@kernel.org>
Date: Thu, 8 Nov 2018 23:20:35 +0530
From: Vinod Koul <vkoul@...nel.org>
To: Andy Gross <andy.gross@...aro.org>,
David Brown <david.brown@...aro.org>
Cc: Rob Herring <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>,
linux-arm-msm@...r.kernel.org, linux-soc@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
Bjorn Andersson <bjorn.andersson@...aro.org>,
Vinod Koul <vkoul@...nel.org>
Subject: [PATCH v3 04/18] arm64: dts: qcom: qcs404: Add RPM GLINK related nodes
From: Bjorn Andersson <bjorn.andersson@...aro.org>
Add RPM GLINK node and the RPM message ram, hwspinlock, APCS apps global
and smem nodes it depends on.
Signed-off-by: Bjorn Andersson <bjorn.andersson@...aro.org>
Signed-off-by: Vinod Koul <vkoul@...nel.org>
---
arch/arm64/boot/dts/qcom/qcs404.dtsi | 44 ++++++++++++++++++++++++++++++++++++
1 file changed, 44 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/qcs404.dtsi b/arch/arm64/boot/dts/qcom/qcs404.dtsi
index 58aa1f989089..e21b4a549e75 100644
--- a/arch/arm64/boot/dts/qcom/qcs404.dtsi
+++ b/arch/arm64/boot/dts/qcom/qcs404.dtsi
@@ -114,12 +114,45 @@
};
};
+ rpm-glink {
+ compatible = "qcom,glink-rpm";
+
+ interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>;
+ qcom,rpm-msg-ram = <&rpm_msg_ram>;
+ mboxes = <&apcs_glb 0>;
+
+ rpm_requests: glink-channel {
+ compatible = "qcom,rpm-qcs404";
+ qcom,glink-channels = "rpm_requests";
+ };
+ };
+
+ smem {
+ compatible = "qcom,smem";
+
+ memory-region = <&smem_region>;
+ qcom,rpm-msg-ram = <&rpm_msg_ram>;
+
+ hwlocks = <&tcsr_mutex 3>;
+ };
+
+ tcsr_mutex: hwlock {
+ compatible = "qcom,tcsr-mutex";
+ syscon = <&tcsr_mutex_regs 0 0x1000>;
+ #hwlock-cells = <1>;
+ };
+
soc: soc@0 {
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0 0 0xffffffff>;
compatible = "simple-bus";
+ rpm_msg_ram: memory@...00 {
+ compatible = "qcom,rpm-msg-ram";
+ reg = <0x00060000 0x6000>;
+ };
+
gcc: clock-controller@...0000 {
compatible = "qcom,gcc-qcs404";
reg = <0x01800000 0x80000>;
@@ -129,6 +162,11 @@
assigned-clock-rates = <19200000>;
};
+ tcsr_mutex_regs: syscon@...5000 {
+ compatible = "syscon";
+ reg = <0x01905000 0x20000>;
+ };
+
blsp1_uart2: serial@...1000 {
compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
reg = <0x078b1000 0x200>;
@@ -146,6 +184,12 @@
<0x0b002000 0x1000>;
};
+ apcs_glb: mailbox@...1000 {
+ compatible = "qcom,qcs404-apcs-apps-global", "syscon";
+ reg = <0x0b011000 0x1000>;
+ #mbox-cells = <1>;
+ };
+
timer@...0000 {
#address-cells = <1>;
#size-cells = <1>;
--
2.14.4
Powered by blists - more mailing lists