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Message-ID: <CAHmME9ot0MiNoW2dRbbHyjenmZnhMZ3N96rymcUYPyKkT2uzDg@mail.gmail.com>
Date: Sun, 11 Nov 2018 22:26:37 -0500
From: "Jason A. Donenfeld" <Jason@...c4.com>
To: kernellwp@...il.com
Cc: Sebastian Siewior <bigeasy@...utronix.de>,
LKML <linux-kernel@...r.kernel.org>, X86 ML <x86@...nel.org>,
Andrew Lutomirski <luto@...nel.org>,
Paolo Bonzini <pbonzini@...hat.com>, rkrcmar@...hat.com,
KVM list <kvm@...r.kernel.org>,
Rik van Riel <riel@...riel.com>, dave.hansen@...ux.intel.com
Subject: Re: [PATCH v4] x86: load FPU registers on return to userland
On Sun, Nov 11, 2018 at 10:02 PM Wanpeng Li <kernellwp@...il.com> wrote:
> On Thu, 8 Nov 2018 at 03:55, Sebastian Andrzej Siewior
> <bigeasy@...utronix.de> wrote:
> >
> > This is a refurbished series originally started by by Rik van Riel. The
> > goal is load the FPU registers on return to userland and not on every
> > context switch. By this optimisation we can:
> > - avoid loading the registers if the task stays in kernel and does
> > not return to userland
> > - make kernel_fpu_begin() cheaper: it only saves the registers on the
> > first invocation. The second invocation does not need save them again.
>
> Do you have any performance data?
In WireGuard, the savings in not having to
save/restore/save/restore/save/restore the registers winds up being in
the order of hundreds of megabits.
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